[Intel-gfx] [PATCH] drm/i915: Fix pipe enabled mask for pipe C in WM calculations

[Chris Wilson]

On Wed, Mar 20, 2013 at 11:05:37PM +0100, Daniel Vetter wrote:
> On Wed, Mar 20, 2013 at 09:51:05PM +0200, ville.syrjala at linux.intel.com wrote:
> > From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > 
> > Cc: stable at vger.kernel.org
> 
> One of the stable rules is that patches should fix real issues. So can you
> please hunt through bugzillas quickly and feed this to relevant bug
> reports?

It would take an astute user to notice that his machine was not using a
lower power self-refresh FIFO mode. And the number of machines that only
set up the third pipe is going to be small, so the impact minor. It
will not fix any of the three pipe issues we have open, for example.

The patch is correct, though had I used enabled |= 1 << PIPE_[ABC] it
would have probably prevented this bug.

Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre