[Intel-gfx] [PATCH v2] drm/i915: Fix pipe enabled mask for pipe C in WM calculations

[Chris Wilson]

On Thu, Mar 21, 2013 at 11:41:45AM +0200, ville.syrjala at linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> Fix the incorrect enabled pipes mask for pipe C in the WM calculations.
> 
> Additionally, in an effort to make the code easier to understand,
> populate the mask with 1 << PIPE_[ABC] instead of raw numbers.
> 
> v2: Use 1 << PIPE_[ABC] (ickle/danvet)
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 22 +++++++++++-----------
>  1 file changed, 11 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 8a3d89e..0bff282 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -1305,13 +1305,13 @@ static void valleyview_update_wm(struct drm_device *dev)
>  			    &valleyview_wm_info, latency_ns,
>  			    &valleyview_cursor_wm_info, latency_ns,
>  			    &planea_wm, &cursora_wm))
> -		enabled |= 1;
> +		enabled |= 1 << PIPE_A;
>  
>  	if (g4x_compute_wm0(dev, 1,
                                 ^ PIPE_B :)
>  			    &valleyview_wm_info, latency_ns,
>  			    &valleyview_cursor_wm_info, latency_ns,
>  			    &planeb_wm, &cursorb_wm))
> -		enabled |= 2;
> +		enabled |= 1 << PIPE_B;
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre