[Intel-gfx] [PATCH 0/8] dp/fdi m/n rework + basic pipe_config readout

[Daniel Vetter]

Hi all,

So now that the basic infrastructure is in I'll (re)dump the next series. It
fixes up the mess around m/n dp/fdi handling, which has been nicely splattered
all over the code.

Missing bit here is that vlv doesn't have a set of specially selected dp pll
values, so will keep on using the generic clock computation code.

Two things in this patch series for the long-term goals:
- Start of dpll values precomputation, needed to proper handle clock sharing
  before touching hw state.
- Start of the pipe-config hw state readout support.

Especially for the 2nd item my plan is to start a nice diversion from my
outstanding pipe-config patches here and port the fastboot state readout from
Chris/Jesse over.

Flames, comments and review highly welcome!

Cheers, Daniel

Daniel Vetter (8):
  drm/i915: clear up the fdi/dp set_m_n confusion
  drm/i915: move dp_m_n computation to dp_encoder->compute_config
  drm/i915: track dp target_clock in pipe_config
  drm/i915: rip out superflous is_dp&is_cpu_edp tracking
  drm/i915: add hw state readout/checking for pipe_config
  drm/i915: hw readout support for ->has_pch_encoders
  drm/i915: create pipe_config->dpll for clock state
  drm/i915: move dp clock computations to encoder->compute_config

 drivers/gpu/drm/i915/i915_drv.h      |   5 +
 drivers/gpu/drm/i915/intel_display.c | 527 +++++++++++++++++------------------
 drivers/gpu/drm/i915/intel_dp.c      | 125 ++++-----
 drivers/gpu/drm/i915/intel_drv.h     |  30 +-
 4 files changed, 335 insertions(+), 352 deletions(-)

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1.7.11.7