[Intel-gfx] [PATCH 2/4] drm/i915: report Gen5+ CPU and PCH FIFO underruns
Daniel Vetter
daniel at ffwll.ch
Thu Mar 28 14:26:54 CET 2013
On Fri, Feb 22, 2013 at 9:05 PM, Paulo Zanoni <przanoni at gmail.com> wrote:
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 010e998..aa8f948 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -238,6 +238,9 @@ struct intel_crtc {
>
> /* reset counter value when the last flip was submitted */
> unsigned int reset_counter;
> +
> + bool disable_cpu_fifo_underrun;
> + bool disable_pch_fifo_underrun;
> };
Forgot one: This needs a comment saying that the underrun stuff is
protected by dev_priv->irq_lock. I kinda like massive locks which
protect all kinds of things less, so I'd personally lean towards a new
dev_priv->underrun_reporting_lock. But that's now a real bikeshed, so
pls ignore ;-) Especially since it really fits well with the already
existing users of the irq_lock.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
More information about the Intel-gfx
mailing list