[Intel-gfx] [PATCH 2/3] drm/i915: move PCH pfit controls into pipe_config

[Daniel Vetter]

On Fri, May 3, 2013 at 12:02 AM, Paulo Zanoni <przanoni at gmail.com> wrote:
>>  static void valleyview_crtc_enable(struct drm_crtc *crtc)
>> @@ -5800,6 +5798,9 @@ static void haswell_modeset_global_resources(struct drm_device *dev)
>>                 /* XXX: Should check for edp transcoder here, but thanks to init
>>                  * sequence that's not yet available. Just in case desktop eDP
>>                  * on PORT D is possible on haswell, too. */
>> +               /* Even the eDP panel fitter is outside the always-on well. */
>> +               if (I915_READ(PF_WIN_SZ(crtc->pipe)))
>
> So this patch made it to drm-intel-next-queued and the line above
> causes "unclaimed register" errors. This happens even if we don't
> disable the power well, and we were 100% clear of these error messages
> on that case, so I guess I can call this a "regression". Can you
> please provide a fix?

Well, that hunk switches from checking dev_priv->pch_pf_size (which is
now in crtc->config, so we'd need to check the right
pipe/cpu_transcoder first) to the register value, which is just plain
bogus.

While at it we could fix the XXX in haswell_crtc_disable, which is now
possible with the pch pfit tracking.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch