[Intel-gfx] [PATCH 6/6] drm/i915: fix up adjusted_mode tracking for interlaced modes
daniel at ffwll.ch
Mon May 6 11:24:42 CEST 2013
On Fri, May 03, 2013 at 11:31:46AM -0300, Paulo Zanoni wrote:
> 2013/5/3 Daniel Vetter <daniel.vetter at ffwll.ch>:
> > On Fri, May 3, 2013 at 11:49 AM, Daniel Vetter <daniel.vetter at ffwll.ch> wrote:
> >> With the hw state readout&check code it's important that the values we
> >> keep around are the canonical ones. Unfortunately when adding the pipe
> >> timings readout support I've missed that the write side adjusts the
> >> timings in the pipe config.
> >> Fix this up.
> >> Reported-by: Paulo Zanoni <przanoni at gmail.com>
> >> Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> > I better be a good example ;-) So:
> > This fixes a regression introduced in
> > commit 1bd1bd806037af04dd1d7bdd39b2b04090c10d2c
> > Author: Daniel Vetter <daniel.vetter at ffwll.ch>
> > Date: Mon Apr 29 21:56:12 2013 +0200
> > drm/i915: hw state readout support for pipe timings
> > Cc: Mika Kuoppala <mika.kuoppala at intel.com>
> To make it super complete, you could also explicitly mention that this
> fixes a WARN when we use interlaced modes :)
> So now I booted it with the eDP + DP-interlaced I was using yesterday
> and I don't see the error message anymore.
> Reviewed-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
> Tested-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
Queued for -next, thanks for the review and testing.
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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