[Intel-gfx] [PATCH 3/4] drm/i915: set proper DPIO post divider for VGA on VLV v4

[Daniel Vetter]

On Mon, May 06, 2013 at 10:52:36AM -0700, Kenneth Graunke wrote:
> On 05/02/2013 10:48 AM, Jesse Barnes wrote:
> >Supposedly we should use the DAC divider for <300MHz pixel clocks, but as
> >that doesn't actually work as well as the high freq divider here in
> >practice, just use the high freq divider all the time.
> >
> >v2: remove unconditional write (Jesse)
> >     check for pixel rate properly (Jesse)
> >v3: give up, the DAC divider apparently doesn't work, and low res modes
> >     work ok (Jesse)
> >     remove debug msg (Jesse)
> >
> >Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org>
> 
> VGA is broken with today's drm-intel-next-queued (3a2128bcac1ae).
> Applying this patch fixes it.  Thanks!
> 
> Tested-by: Kenneth Graunke <kenneth at whitecape.org>

Queued for -next, thanks for the patch.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch