[Intel-gfx] [PATCH 4/5] drm/i915: check the power well on i915_pipe_enabled

Paulo Zanoni przanoni at gmail.com
Tue May 7 16:18:45 CEST 2013


2013/5/7 Daniel Vetter <daniel at ffwll.ch>:
> On Fri, May 03, 2013 at 12:15:39PM -0300, Paulo Zanoni wrote:
>> From: Paulo Zanoni <paulo.r.zanoni at intel.com>
>>
>> This fixes "unclaimed register" messages when the power well is
>> disabled and there's a GPU hang.
>
> How does this blow up in a gpu hang? Afaics pipe_enabled is mostly called
> in the vblank code, so this should blow up any time we call a vblank
> function on a disabled pipe ...

If I add patches to also detect unclaimed "reads" instead of just
writes and some dump_stack() calls, then call ZZ_hangman:

[   89.025325] [drm:i915_error_work_func], resetting chip
[   89.029470] [drm] Simulated gpu hang, resetting stop_rings
[   89.029623] [drm:hsw_unclaimed_reg_check] *ERROR* Unclaimed 71008
[   89.032526] Pid: 63, comm: kworker/u:3 Not tainted
3.9.0-rc5.1305071105+ #721
[   89.032529] Call Trace:
[   89.032547]  [<ffffffffa00a550a>] hsw_unclaimed_reg_check+0x5b/0x5f
[i915]
[   89.032558]  [<ffffffffa00a5d35>] i915_read32+0xd0/0xe0 [i915]
[   89.032569]  [<ffffffffa00a9704>] i915_pipe_enabled+0x59/0x63
[i915]
[   89.032580]  [<ffffffffa00ab488>] gm45_get_vblank_counter+0x1a/0x5b
[i915]
[   89.032594]  [<ffffffffa0018324>] drm_irq_uninstall+0xbe/0x169
[drm]
[   89.032604]  [<ffffffffa00a6609>] i915_reset+0x140/0x16a [i915]
[   89.032615]  [<ffffffffa00ab030>] i915_error_work_func+0xc1/0x159
[i915]
[   89.032620]  [<ffffffff810498a7>] process_one_work+0x17c/0x2b8
[   89.032624]  [<ffffffff8104a216>] worker_thread+0x135/0x1e4
[   89.032627]  [<ffffffff8104a0e1>] ? manage_workers+0x248/0x248
[   89.032631]  [<ffffffff8104e5a1>] kthread+0x8d/0x95
[   89.032635]  [<ffffffff8104e514>] ? __kthread_parkme+0x65/0x65
[   89.032639]  [<ffffffff814e5b5c>] ret_from_fork+0x7c/0xb0
[   89.032643]  [<ffffffff8104e514>] ? __kthread_parkme+0x65/0x65
[   89.032645] [drm:gm45_get_vblank_counter], trying to get vblank
count for disabled pipe B
[   89.032651] [drm:hsw_unclaimed_reg_check] *ERROR* Unclaimed 72008
[   89.035460] Pid: 63, comm: kworker/u:3 Not tainted
3.9.0-rc5.1305071105+ #721
[   89.035462] Call Trace:
[   89.035473]  [<ffffffffa00a550a>] hsw_unclaimed_reg_check+0x5b/0x5f
[i915]
[   89.035483]  [<ffffffffa00a5d35>] i915_read32+0xd0/0xe0 [i915]
[   89.035493]  [<ffffffffa00a9704>] i915_pipe_enabled+0x59/0x63
[i915]
[   89.035503]  [<ffffffffa00ab488>] gm45_get_vblank_counter+0x1a/0x5b
[i915]
[   89.035514]  [<ffffffffa0018324>] drm_irq_uninstall+0xbe/0x169
[drm]
[   89.035524]  [<ffffffffa00a6609>] i915_reset+0x140/0x16a [i915]
[   89.035535]  [<ffffffffa00ab030>] i915_error_work_func+0xc1/0x159
[i915]
[   89.035539]  [<ffffffff810498a7>] process_one_work+0x17c/0x2b8
[   89.035542]  [<ffffffff8104a216>] worker_thread+0x135/0x1e4
[   89.035545]  [<ffffffff8104a0e1>] ? manage_workers+0x248/0x248
[   89.035549]  [<ffffffff8104e5a1>] kthread+0x8d/0x95
[   89.035553]  [<ffffffff8104e514>] ? __kthread_parkme+0x65/0x65
[   89.035556]  [<ffffffff814e5b5c>] ret_from_fork+0x7c/0xb0
[   89.035560]  [<ffffffff8104e514>] ? __kthread_parkme+0x65/0x65
[   89.035562] [drm:gm45_get_vblank_counter], trying to get vblank
count for disabled pipe C


>
> Also yet another reason to hate the vblank code, the locking is horrible
> in here.
> -Daniel
>
>>
>> v2: Use the new intel_display_power_enabled().
>> v3: Use the new domains for intel_display_power_enabled().
>>
>> Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
>> ---
>>  drivers/gpu/drm/i915/i915_irq.c |    4 ++++
>>  1 file changed, 4 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
>> index 03a31be..161101f 100644
>> --- a/drivers/gpu/drm/i915/i915_irq.c
>> +++ b/drivers/gpu/drm/i915/i915_irq.c
>> @@ -384,6 +384,10 @@ i915_pipe_enabled(struct drm_device *dev, int pipe)
>>       enum transcoder cpu_transcoder = intel_pipe_to_cpu_transcoder(dev_priv,
>>                                                                     pipe);
>>
>> +     if (!intel_display_power_enabled(dev,
>> +             POWER_DOMAIN_TRANSCODER(cpu_transcoder)))
>> +             return false;
>> +
>>       return I915_READ(PIPECONF(cpu_transcoder)) & PIPECONF_ENABLE;
>>  }
>>
>> --
>> 1.7.10.4
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx at lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> +41 (0) 79 365 57 48 - http://blog.ffwll.ch



-- 
Paulo Zanoni



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