[Intel-gfx] [PATCH 3/6] drm/i915: Enable the overlay right after primary and cursor planes

[ville.syrjala at linux.intel.com]

From: Ville Syrjälä <ville.syrjala at linux.intel.com>

Again follow the same sequence for all generations, because doing
otherwise just doesn't make sense.

Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index e2037d5..ee656f8 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3687,11 +3687,11 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
 	intel_enable_plane(dev_priv, plane, pipe);
 	intel_crtc_update_cursor(crtc, true);
 
-	intel_update_fbc(dev);
-
 	/* Give the overlay scaler a chance to enable if it's on this pipe */
 	intel_crtc_dpms_overlay(intel_crtc, true);
 
+	intel_update_fbc(dev);
+
 	mutex_unlock(&dev_priv->dpio_lock);
 }
 
@@ -3729,11 +3729,11 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
 	if (IS_G4X(dev))
 		g4x_fixup_plane(dev_priv, pipe);
 
-	intel_update_fbc(dev);
-
 	/* Give the overlay scaler a chance to enable if it's on this pipe */
 	intel_crtc_dpms_overlay(intel_crtc, true);
 
+	intel_update_fbc(dev);
+
 	for_each_encoder_on_crtc(dev, crtc, encoder)
 		encoder->enable(encoder);
 }
-- 
1.8.1.5