[Intel-gfx] [PATCH] drm/i915: Compute WR PLL dividers dynamically
damien.lespiau at intel.com
Wed May 8 18:23:09 CEST 2013
On Wed, May 08, 2013 at 01:07:23PM -0300, Paulo Zanoni wrote:
> I also looked briefly to your i-g-t patches. They look fine, but my
> concern is that the code inside the Kernel will get out-of-sync with
> the code in i-g-t, so we won't really be able to catch regressions.
> OTOH, I do have an idea for a different i-g-t test: you read our
> registers (WRPLL_1, WRPLL_2, Link M) in order to check which
> frequency/r/n/p we're using inside the Kernel, then you look at the
> old wrpll_tmds_clock_table and check if the values used on the Kernel
> match the values on the table. Maybe this should be incorporated at
> testdisplay. Maybe my idea is just a bad idea and should be ignored.
> Feel free to do whatever you prefer for the i-g-t patches.
Yes, I've had the same thoughts about this as well. I was even pondering
pulling enough code in a "kernel compat" library/headers to be able to
compile intel_ddi.c and sync it with the kernel one, once in a while.
I like your idea of adding the wrpll test to testdisplay, not
volunteering for that at the moment though :)
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