[Intel-gfx] [PATCH] drm/i915: Add missing platform tags to FBC workaround comments

[Daniel Vetter]

On Fri, May 10, 2013 at 02:33:17PM +0100, Damien Lespiau wrote:
> There was a race between Rodrigo writing those patches and me
> formalizing the addition of platform tags. This patches fixes it.
> 
> Signed-off-by: Damien Lespiau <damien.lespiau at intel.com>

Queued for -next, thanks for the patch.
-Daniel
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index d806448..28cec57 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -243,13 +243,13 @@ static void ironlake_disable_fbc(struct drm_device *dev)
>  		I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl);
>  
>  		if (IS_IVYBRIDGE(dev))
> -			/* WaFbcDisableDpfcClockGating */
> +			/* WaFbcDisableDpfcClockGating:ivb */
>  			I915_WRITE(ILK_DSPCLK_GATE_D,
>  				   I915_READ(ILK_DSPCLK_GATE_D) &
>  				   ~ILK_DPFCUNIT_CLOCK_GATE_DISABLE);
>  
>  		if (IS_HASWELL(dev))
> -			/* WaFbcDisableDpfcClockGating */
> +			/* WaFbcDisableDpfcClockGating:hsw */
>  			I915_WRITE(HSW_CLKGATE_DISABLE_PART_1,
>  				   I915_READ(HSW_CLKGATE_DISABLE_PART_1) &
>  				   ~HSW_DPFC_GATING_DISABLE);
> @@ -281,17 +281,17 @@ static void gen7_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
>  		   intel_crtc->plane << IVB_DPFC_CTL_PLANE_SHIFT);
>  
>  	if (IS_IVYBRIDGE(dev)) {
> -		/* WaFbcAsynchFlipDisableFbcQueue */
> +		/* WaFbcAsynchFlipDisableFbcQueue:ivb */
>  		I915_WRITE(ILK_DISPLAY_CHICKEN1, ILK_FBCQ_DIS);
> -		/* WaFbcDisableDpfcClockGating */
> +		/* WaFbcDisableDpfcClockGating:ivb */
>  		I915_WRITE(ILK_DSPCLK_GATE_D,
>  			   I915_READ(ILK_DSPCLK_GATE_D) |
>  			   ILK_DPFCUNIT_CLOCK_GATE_DISABLE);
>  	} else {
> -		/* WaFbcAsynchFlipDisableFbcQueue */
> +		/* WaFbcAsynchFlipDisableFbcQueue:hsw */
>  		I915_WRITE(HSW_PIPE_SLICE_CHICKEN_1(intel_crtc->pipe),
>  			   HSW_BYPASS_FBC_QUEUE);
> -		/* WaFbcDisableDpfcClockGating */
> +		/* WaFbcDisableDpfcClockGating:hsw */
>  		I915_WRITE(HSW_CLKGATE_DISABLE_PART_1,
>  			   I915_READ(HSW_CLKGATE_DISABLE_PART_1) |
>  			   HSW_DPFC_GATING_DISABLE);
> -- 
> 1.8.1.4
> 
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch