[Intel-gfx] [PATCH kernel] drm/i915: Adding more reserved PCI IDs for Haswell.

Tue May 14 00:06:51 CEST 2013

Hi

2013/5/13 Rodrigo Vivi <rodrigo.vivi at gmail.com>:
> At DDX commit Chris mentioned the tendency we have of finding out more
> PCI IDs only when users report. So Let's add all new reserved Haswell IDs.
>
> This patch also fix GT3 names. I'no not sending in separated patche because
> names are only in few comments and not in variable names.
>
> References: http://bugs.freedesktop.org/show_bug.cgi?id=63701
> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi at gmail.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.c | 46 +++++++++++++++++++++++++++++++----------
>  1 file changed, 35 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index a1a936f..fd110f2 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -370,40 +370,64 @@ static const struct pci_device_id pciidlist[] = {         /* aka */
>         INTEL_VGA_DEVICE(0x016a, &intel_ivybridge_d_info), /* GT2 server */
>         INTEL_VGA_DEVICE(0x0402, &intel_haswell_d_info), /* GT1 desktop */
>         INTEL_VGA_DEVICE(0x0412, &intel_haswell_d_info), /* GT2 desktop */
> -       INTEL_VGA_DEVICE(0x0422, &intel_haswell_d_info), /* GT2 desktop */
> +       INTEL_VGA_DEVICE(0x0422, &intel_haswell_d_info), /* GT3 desktop */
>         INTEL_VGA_DEVICE(0x040a, &intel_haswell_d_info), /* GT1 server */
>         INTEL_VGA_DEVICE(0x041a, &intel_haswell_d_info), /* GT2 server */
> -       INTEL_VGA_DEVICE(0x042a, &intel_haswell_d_info), /* GT2 server */
> +       INTEL_VGA_DEVICE(0x042a, &intel_haswell_d_info), /* GT3 server */
>         INTEL_VGA_DEVICE(0x0406, &intel_haswell_m_info), /* GT1 mobile */
>         INTEL_VGA_DEVICE(0x0416, &intel_haswell_m_info), /* GT2 mobile */
>         INTEL_VGA_DEVICE(0x0426, &intel_haswell_m_info), /* GT2 mobile */
> +       INTEL_VGA_DEVICE(0x040B, &intel_haswell_d_info), /* GT1 reserved */
> +       INTEL_VGA_DEVICE(0x041B, &intel_haswell_d_info), /* GT2 reserved */
> +       INTEL_VGA_DEVICE(0x042B, &intel_haswell_d_info), /* GT3 reserved */
> +       INTEL_VGA_DEVICE(0x040E, &intel_haswell_d_info), /* GT1 reserved */
> +       INTEL_VGA_DEVICE(0x041E, &intel_haswell_d_info), /* GT2 reserved */

This one will be a desktop.

> +       INTEL_VGA_DEVICE(0x042E, &intel_haswell_d_info), /* GT3 reserved */
>         INTEL_VGA_DEVICE(0x0C02, &intel_haswell_d_info), /* SDV GT1 desktop */
>         INTEL_VGA_DEVICE(0x0C12, &intel_haswell_d_info), /* SDV GT2 desktop */
> -       INTEL_VGA_DEVICE(0x0C22, &intel_haswell_d_info), /* SDV GT2 desktop */
> +       INTEL_VGA_DEVICE(0x0C22, &intel_haswell_d_info), /* SDV GT3 desktop */
>         INTEL_VGA_DEVICE(0x0C0A, &intel_haswell_d_info), /* SDV GT1 server */
>         INTEL_VGA_DEVICE(0x0C1A, &intel_haswell_d_info), /* SDV GT2 server */
> -       INTEL_VGA_DEVICE(0x0C2A, &intel_haswell_d_info), /* SDV GT2 server */
> +       INTEL_VGA_DEVICE(0x0C2A, &intel_haswell_d_info), /* SDV GT3 server */
>         INTEL_VGA_DEVICE(0x0C06, &intel_haswell_m_info), /* SDV GT1 mobile */
>         INTEL_VGA_DEVICE(0x0C16, &intel_haswell_m_info), /* SDV GT2 mobile */
> -       INTEL_VGA_DEVICE(0x0C26, &intel_haswell_m_info), /* SDV GT2 mobile */
> +       INTEL_VGA_DEVICE(0x0C26, &intel_haswell_m_info), /* SDV GT3 mobile */
> +       INTEL_VGA_DEVICE(0x0C0B, &intel_haswell_d_info), /* SDV GT1 reserved */
> +       INTEL_VGA_DEVICE(0x0C1B, &intel_haswell_d_info), /* SDV GT2 reserved */
> +       INTEL_VGA_DEVICE(0x0C2B, &intel_haswell_d_info), /* SDV GT3 reserved */
> +       INTEL_VGA_DEVICE(0x0C0E, &intel_haswell_d_info), /* SDV GT1 reserved */
> +       INTEL_VGA_DEVICE(0x0C1E, &intel_haswell_d_info), /* SDV GT2 reserved */
> +       INTEL_VGA_DEVICE(0x0C2E, &intel_haswell_d_info), /* SDV GT3 reserved */

Do we plan to keep SDV IDs forever?

>         INTEL_VGA_DEVICE(0x0A02, &intel_haswell_d_info), /* ULT GT1 desktop */
>         INTEL_VGA_DEVICE(0x0A12, &intel_haswell_d_info), /* ULT GT2 desktop */
> -       INTEL_VGA_DEVICE(0x0A22, &intel_haswell_d_info), /* ULT GT2 desktop */
> +       INTEL_VGA_DEVICE(0x0A22, &intel_haswell_d_info), /* ULT GT3 desktop */
>         INTEL_VGA_DEVICE(0x0A0A, &intel_haswell_d_info), /* ULT GT1 server */
>         INTEL_VGA_DEVICE(0x0A1A, &intel_haswell_d_info), /* ULT GT2 server */
> -       INTEL_VGA_DEVICE(0x0A2A, &intel_haswell_d_info), /* ULT GT2 server */
> +       INTEL_VGA_DEVICE(0x0A2A, &intel_haswell_d_info), /* ULT GT3 server */
>         INTEL_VGA_DEVICE(0x0A06, &intel_haswell_m_info), /* ULT GT1 mobile */
>         INTEL_VGA_DEVICE(0x0A16, &intel_haswell_m_info), /* ULT GT2 mobile */
> -       INTEL_VGA_DEVICE(0x0A26, &intel_haswell_m_info), /* ULT GT2 mobile */
> +       INTEL_VGA_DEVICE(0x0A26, &intel_haswell_m_info), /* ULT GT3 mobile */
> +       INTEL_VGA_DEVICE(0x0A0B, &intel_haswell_d_info), /* ULT GT1 reserved */
> +       INTEL_VGA_DEVICE(0x0A1B, &intel_haswell_d_info), /* ULT GT2 reserved */
> +       INTEL_VGA_DEVICE(0x0A2B, &intel_haswell_d_info), /* ULT GT3 reserved */
> +       INTEL_VGA_DEVICE(0x0A0E, &intel_haswell_d_info), /* ULT GT1 reserved */

This will be a mobile one.

> +       INTEL_VGA_DEVICE(0x0A1E, &intel_haswell_d_info), /* ULT GT2 reserved */

Also mobile.

> +       INTEL_VGA_DEVICE(0x0A2E, &intel_haswell_d_info), /* ULT GT3 reserved */

Also mobile.

But when I look at our code I don't see any difference between mobile
and desktop on Haswell (actually I don't see a difference between
mobile and desktop for anything newer than Ironlake).

Everything else looks correct.

>         INTEL_VGA_DEVICE(0x0D02, &intel_haswell_d_info), /* CRW GT1 desktop */
>         INTEL_VGA_DEVICE(0x0D12, &intel_haswell_d_info), /* CRW GT2 desktop */
> -       INTEL_VGA_DEVICE(0x0D22, &intel_haswell_d_info), /* CRW GT2 desktop */
> +       INTEL_VGA_DEVICE(0x0D22, &intel_haswell_d_info), /* CRW GT3 desktop */
>         INTEL_VGA_DEVICE(0x0D0A, &intel_haswell_d_info), /* CRW GT1 server */
>         INTEL_VGA_DEVICE(0x0D1A, &intel_haswell_d_info), /* CRW GT2 server */
> -       INTEL_VGA_DEVICE(0x0D2A, &intel_haswell_d_info), /* CRW GT2 server */
> +       INTEL_VGA_DEVICE(0x0D2A, &intel_haswell_d_info), /* CRW GT3 server */
>         INTEL_VGA_DEVICE(0x0D06, &intel_haswell_m_info), /* CRW GT1 mobile */
>         INTEL_VGA_DEVICE(0x0D16, &intel_haswell_m_info), /* CRW GT2 mobile */
> -       INTEL_VGA_DEVICE(0x0D26, &intel_haswell_m_info), /* CRW GT2 mobile */
> +       INTEL_VGA_DEVICE(0x0D26, &intel_haswell_m_info), /* CRW GT3 mobile */
> +       INTEL_VGA_DEVICE(0x0D0B, &intel_haswell_d_info), /* CRW GT1 reserved */
> +       INTEL_VGA_DEVICE(0x0D1B, &intel_haswell_d_info), /* CRW GT2 reserved */
> +       INTEL_VGA_DEVICE(0x0D2B, &intel_haswell_d_info), /* CRW GT3 reserved */
> +       INTEL_VGA_DEVICE(0x0D0E, &intel_haswell_d_info), /* CRW GT1 reserved */
> +       INTEL_VGA_DEVICE(0x0D1E, &intel_haswell_d_info), /* CRW GT2 reserved */
> +       INTEL_VGA_DEVICE(0x0D2E, &intel_haswell_d_info), /* CRW GT3 reserved */
>         INTEL_VGA_DEVICE(0x0f30, &intel_valleyview_m_info),
>         INTEL_VGA_DEVICE(0x0f31, &intel_valleyview_m_info),
>         INTEL_VGA_DEVICE(0x0f32, &intel_valleyview_m_info),
> --
> 1.8.1.4
>
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-- 
Paulo Zanoni