[Intel-gfx] [PATCH] drm/i915: Disable trickle feed in ironlake_init_clock_gating()
ville.syrjala at linux.intel.com
ville.syrjala at linux.intel.com
Tue May 21 16:47:50 CEST 2013
From: Ville Syrjälä <ville.syrjala at linux.intel.com>
We disable trickle feed in all the (relevant) clock gating functions,
except ironlake_init_clock_gating(). Copy paste the same code there as
well.
Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 93d13d9..4ca214d 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3870,6 +3870,7 @@ static void ironlake_init_clock_gating(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev->dev_private;
uint32_t dspclk_gate = ILK_VRHUNIT_CLOCK_GATE_DISABLE;
+ int pipe;
/* Required for FBC */
dspclk_gate |= ILK_DPFCRUNIT_CLOCK_GATE_DISABLE |
@@ -3929,6 +3930,13 @@ static void ironlake_init_clock_gating(struct drm_device *dev)
I915_WRITE(CACHE_MODE_0,
_MASKED_BIT_ENABLE(CM0_PIPELINED_RENDER_FLUSH_DISABLE));
+ for_each_pipe(pipe) {
+ I915_WRITE(DSPCNTR(pipe),
+ I915_READ(DSPCNTR(pipe)) |
+ DISPPLANE_TRICKLE_FEED_DISABLE);
+ intel_flush_display_plane(dev_priv, pipe);
+ }
+
ibx_init_clock_gating(dev);
}
--
1.8.1.5
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