[Intel-gfx] [PATCH] drm/i915: Haswell FBC supports up to 4096x4096

[Paulo Zanoni]

From: Paulo Zanoni <paulo.r.zanoni at intel.com>

But only the first 2048 lines will be compressed. No problem.

With this I can finally see FBC on my 2560x1440 DP monitor, which
gives me a boost on the PC7 residency.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 16 +++++++++++++---
 1 file changed, 13 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 6fdfd1a..190bae5 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -431,7 +431,7 @@ void intel_disable_fbc(struct drm_device *dev)
  *   - no pixel mulitply/line duplication
  *   - no alpha buffer discard
  *   - no dual wide
- *   - framebuffer <= 2048 in width, 1536 in height
+ *   - framebuffer <= max_hdisplay in width, max_vdisplay in height
  *
  * We can't assume that any compression will take place (worst case),
  * so the compressed buffer has to be the same size as the uncompressed
@@ -449,6 +449,7 @@ void intel_update_fbc(struct drm_device *dev)
 	struct intel_framebuffer *intel_fb;
 	struct drm_i915_gem_object *obj;
 	int enable_fbc;
+	unsigned int max_vdisplay, max_hdisplay;
 
 	if (!i915_powersave)
 		return;
@@ -507,8 +508,17 @@ void intel_update_fbc(struct drm_device *dev)
 		dev_priv->no_fbc_reason = FBC_UNSUPPORTED_MODE;
 		goto out_disable;
 	}
-	if ((crtc->mode.hdisplay > 2048) ||
-	    (crtc->mode.vdisplay > 1536)) {
+
+	if (INTEL_INFO(dev)->gen < 7 || IS_IVYBRIDGE(dev) ||
+	    IS_VALLEYVIEW(dev)) {
+		max_hdisplay = 2048;
+		max_vdisplay = 1536;
+	} else {
+		max_hdisplay = 4096;
+		max_vdisplay = 4096;
+	}
+	if ((crtc->mode.hdisplay > max_hdisplay) ||
+	    (crtc->mode.vdisplay > max_vdisplay)) {
 		DRM_DEBUG_KMS("mode too large for compression, disabling\n");
 		dev_priv->no_fbc_reason = FBC_MODE_TOO_LARGE;
 		goto out_disable;
-- 
1.8.1.2