[Intel-gfx] [PATCH] drm/i915: add basic pipe config dump support
Daniel Vetter
daniel at ffwll.ch
Tue May 28 16:29:52 CEST 2013
On Tue, May 28, 2013 at 11:17:34AM -0300, Paulo Zanoni wrote:
> 2013/5/28 Daniel Vetter <daniel.vetter at ffwll.ch>:
> > All this pipe config abstraction adds another layer of complexity, so
> > it's good to have better visibility into what's going on exactly.
> > Doesn't dump out everything yet, and some bits are a bit duplicated
> > but this should be a good start.
> >
> > Note that at boot-up a lot of the fields are 0 even for enabled pipes,
> > this is simply because our hw state readout code doesn't support
> > everything.
> >
> > v2: Remove a few more now redudant debug output lines.
> >
> > v3: Review from Paulo
> > - use transcoder_name
> > - fix up format specifiers
> > - add missing ':' in debug output
> >
> > Cc: Paulo Zanoni <przanoni at gmail.com>
> > Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
>
> Reviewed-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
Queued for -next, thanks for the review.
-Daniel
>
> > ---
> > drivers/gpu/drm/i915/intel_display.c | 74 +++++++++++++++++++++---------------
> > 1 file changed, 44 insertions(+), 30 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index 57fd85e..87d8bc9 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -3528,18 +3528,12 @@ static void i9xx_pfit_enable(struct intel_crtc *crtc)
> > if (!crtc->config.gmch_pfit.control)
> > return;
> >
> > - WARN_ON(I915_READ(PFIT_CONTROL) & PFIT_ENABLE);
> > - assert_pipe_disabled(dev_priv, crtc->pipe);
> > -
> > /*
> > - * Enable automatic panel scaling so that non-native modes
> > - * fill the screen. The panel fitter should only be
> > - * adjusted whilst the pipe is disabled, according to
> > - * register description and PRM.
> > + * The panel fitter should only be adjusted whilst the pipe is disabled,
> > + * according to register description and PRM.
> > */
> > - DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
> > - pipe_config->gmch_pfit.control,
> > - pipe_config->gmch_pfit.pgm_ratios);
> > + WARN_ON(I915_READ(PFIT_CONTROL) & PFIT_ENABLE);
> > + assert_pipe_disabled(dev_priv, crtc->pipe);
> >
> > I915_WRITE(PFIT_PGM_RATIOS, pipe_config->gmch_pfit.pgm_ratios);
> > I915_WRITE(PFIT_CONTROL, pipe_config->gmch_pfit.control);
> > @@ -4862,9 +4856,6 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
> > dspcntr |= DISPPLANE_SEL_PIPE_B;
> > }
> >
> > - DRM_DEBUG_KMS("Mode for pipe %c:\n", pipe_name(pipe));
> > - drm_mode_debug_printmodeline(mode);
> > -
> > intel_set_pipe_timings(intel_crtc, mode, adjusted_mode);
> >
> > /* pipesrc and dspsize control the size that is scaled from,
> > @@ -5666,9 +5657,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
> > /* Ensure that the cursor is valid for the new mode before changing... */
> > intel_crtc_update_cursor(crtc, true);
> >
> > - DRM_DEBUG_KMS("Mode for pipe %c:\n", pipe_name(pipe));
> > - drm_mode_debug_printmodeline(mode);
> > -
> > /* CPU eDP is the only output that doesn't need a PCH PLL of its own. */
> > if (intel_crtc->config.has_pch_encoder) {
> > struct intel_pch_pll *pll;
> > @@ -5879,9 +5867,6 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc,
> > /* Ensure that the cursor is valid for the new mode before changing... */
> > intel_crtc_update_cursor(crtc, true);
> >
> > - DRM_DEBUG_KMS("Mode for pipe %c:\n", pipe_name(pipe));
> > - drm_mode_debug_printmodeline(mode);
> > -
> > if (intel_crtc->config.has_dp_encoder)
> > intel_dp_set_m_n(intel_crtc);
> >
> > @@ -7690,6 +7675,35 @@ pipe_config_set_bpp(struct drm_crtc *crtc,
> > return bpp;
> > }
> >
> > +static void intel_dump_pipe_config(struct intel_crtc *crtc,
> > + struct intel_crtc_config *pipe_config,
> > + const char *context)
> > +{
> > + DRM_DEBUG_KMS("[CRTC:%d]%s config for pipe %c\n", crtc->base.base.id,
> > + context, pipe_name(crtc->pipe));
> > +
> > + DRM_DEBUG_KMS("cpu_transcoder: %c\n", transcoder_name(pipe_config->cpu_transcoder));
> > + DRM_DEBUG_KMS("pipe bpp: %i, dithering: %i\n",
> > + pipe_config->pipe_bpp, pipe_config->dither);
> > + DRM_DEBUG_KMS("fdi/pch: %i, lanes: %i, gmch_m: %u, gmch_n: %u, link_m: %u, link_n: %u, tu: %u\n",
> > + pipe_config->has_pch_encoder,
> > + pipe_config->fdi_lanes,
> > + pipe_config->fdi_m_n.gmch_m, pipe_config->fdi_m_n.gmch_n,
> > + pipe_config->fdi_m_n.link_m, pipe_config->fdi_m_n.link_n,
> > + pipe_config->fdi_m_n.tu);
> > + DRM_DEBUG_KMS("requested mode:\n");
> > + drm_mode_debug_printmodeline(&pipe_config->requested_mode);
> > + DRM_DEBUG_KMS("adjusted mode:\n");
> > + drm_mode_debug_printmodeline(&pipe_config->adjusted_mode);
> > + DRM_DEBUG_KMS("gmch pfit: control: 0x%08x, ratios: 0x%08x, lvds border: 0x%08x\n",
> > + pipe_config->gmch_pfit.control,
> > + pipe_config->gmch_pfit.pgm_ratios,
> > + pipe_config->gmch_pfit.lvds_border_bits);
> > + DRM_DEBUG_KMS("pch pfit: pos: 0x%08x, size: 0x%08x\n",
> > + pipe_config->pch_pfit.pos,
> > + pipe_config->pch_pfit.size);
> > +}
> > +
> > static struct intel_crtc_config *
> > intel_modeset_pipe_config(struct drm_crtc *crtc,
> > struct drm_framebuffer *fb,
> > @@ -7760,8 +7774,6 @@ encoder_retry:
> > goto encoder_retry;
> > }
> >
> > - DRM_DEBUG_KMS("[CRTC:%d]\n", crtc->base.id);
> > -
> > pipe_config->dither = pipe_config->pipe_bpp != plane_bpp;
> > DRM_DEBUG_KMS("plane bpp: %i, pipe bpp: %i, dithering: %i\n",
> > plane_bpp, pipe_config->pipe_bpp, pipe_config->dither);
> > @@ -8118,9 +8130,14 @@ intel_modeset_check_state(struct drm_device *dev)
> > "crtc active state doesn't match with hw state "
> > "(expected %i, found %i)\n", crtc->active, active);
> >
> > - WARN(active &&
> > - !intel_pipe_config_compare(dev, &crtc->config, &pipe_config),
> > - "pipe state doesn't match!\n");
> > + if (active &&
> > + !intel_pipe_config_compare(dev, &crtc->config, &pipe_config)) {
> > + WARN(1, "pipe state doesn't match!\n");
> > + intel_dump_pipe_config(crtc, &pipe_config,
> > + "[hw state]");
> > + intel_dump_pipe_config(crtc, &crtc->config,
> > + "[sw state]");
> > + }
> > }
> > }
> >
> > @@ -8160,6 +8177,8 @@ static int __intel_set_mode(struct drm_crtc *crtc,
> >
> > goto out;
> > }
> > + intel_dump_pipe_config(to_intel_crtc(crtc), pipe_config,
> > + "[modeset]");
> > }
> >
> > for_each_intel_crtc_masked(dev, disable_pipes, intel_crtc)
> > @@ -8516,12 +8535,6 @@ static int intel_crtc_set_config(struct drm_mode_set *set)
> > goto fail;
> >
> > if (config->mode_changed) {
> > - if (set->mode) {
> > - DRM_DEBUG_KMS("attempting to set mode from"
> > - " userspace\n");
> > - drm_mode_debug_printmodeline(set->mode);
> > - }
> > -
> > ret = intel_set_mode(set->crtc, set->mode,
> > set->x, set->y, set->fb);
> > } else if (config->fb_changed) {
> > @@ -9536,6 +9549,7 @@ void intel_modeset_setup_hw_state(struct drm_device *dev,
> > for_each_pipe(pipe) {
> > crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
> > intel_sanitize_crtc(crtc);
> > + intel_dump_pipe_config(crtc, &crtc->config, "[setup_hw_state]");
> > }
> >
> > if (force_restore) {
> > --
> > 1.8.1.4
> >
>
>
>
> --
> Paulo Zanoni
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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