[Intel-gfx] [PATCH 2/3] drm/i915: add enable_ips module option
Rodrigo Vivi
rodrigo.vivi at gmail.com
Fri May 31 18:04:33 CEST 2013
Reviewed-by:
Rodrigo Vivi <rodrigo.vivi at gmail.com>
On Thu, May 16, 2013 at 4:56 PM, Paulo Zanoni <przanoni at gmail.com> wrote:
> From: Paulo Zanoni <paulo.r.zanoni at intel.com>
>
> IPS is still enabled by default. Feature requested by the power
> management team.
>
> This should also help testing the feature on some early pre-production
> hardware where there were relationship problems between IPS and PSR.
>
> v2: Rebase on top of the newest IPS implementation.
>
> Requested-by: Kristen Accardi <kristen.c.accardi at intel.com>
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.c | 4 ++++
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/intel_display.c | 3 ++-
> 3 files changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index a1a936f..0289f24 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -128,6 +128,10 @@ module_param_named(disable_power_well, i915_disable_power_well, int, 0600);
> MODULE_PARM_DESC(disable_power_well,
> "Disable the power well when possible (default: false)");
>
> +int i915_enable_ips __read_mostly = 1;
> +module_param_named(enable_ips, i915_enable_ips, int, 0600);
> +MODULE_PARM_DESC(enable_ips, "Enable IPS (default: true)");
> +
> static struct drm_driver driver;
> extern int intel_agp_enabled;
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 639ec0b..a25669f 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1460,6 +1460,7 @@ extern bool i915_enable_hangcheck __read_mostly;
> extern int i915_enable_ppgtt __read_mostly;
> extern unsigned int i915_preliminary_hw_support __read_mostly;
> extern int i915_disable_power_well __read_mostly;
> +extern int i915_enable_ips __read_mostly;
>
> extern int i915_suspend(struct drm_device *dev, pm_message_t state);
> extern int i915_resume(struct drm_device *dev);
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 5b41cf3..afde99e 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -3343,7 +3343,8 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
> /* IPS only exists on ULT machines and is tied to pipe A. */
> static bool hsw_crtc_supports_ips(struct intel_crtc *crtc)
> {
> - return (IS_ULT(crtc->base.dev) && crtc->pipe == PIPE_A);
> + return (i915_enable_ips && IS_ULT(crtc->base.dev) &&
> + crtc->pipe == PIPE_A);
> }
>
> static void hsw_enable_ips(struct intel_crtc *crtc)
> --
> 1.8.1.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
More information about the Intel-gfx
mailing list