[Intel-gfx] [PATCH 46/62] drm/i915/bdw: BDW also has only 2 FDI lanes

Ben Widawsky benjamin.widawsky at intel.com
Sun Nov 3 05:07:44 CET 2013


From: Paulo Zanoni <paulo.r.zanoni at intel.com>

So treat it like Haswell.

Reviewed-by: Art Runyan <arthur.j.runyan at intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 193ce3d..fce3b0d 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4198,7 +4198,7 @@ static bool ironlake_check_fdi_lanes(struct drm_device *dev, enum pipe pipe,
 		return false;
 	}
 
-	if (IS_HASWELL(dev)) {
+	if (IS_HASWELL(dev) || IS_BROADWELL(dev)) {
 		if (pipe_config->fdi_lanes > 2) {
 			DRM_DEBUG_KMS("only 2 lanes on haswell, required: %i lanes\n",
 				      pipe_config->fdi_lanes);
-- 
1.8.4.2




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