[Intel-gfx] [PATCH 36/62] drm/i915/bdw: Broadwell also has the "power down well"

[Ville Syrjälä]

On Sat, Nov 02, 2013 at 09:07:34PM -0700, Ben Widawsky wrote:
> From: Paulo Zanoni <paulo.r.zanoni at intel.com>
> 
> Just like Haswell, but with the small twist that the panel fitter for pipe A is
> now also in the always-on power well.
> 
> v2: Use the new HAS_POWER_WELL macro.
> 
> v3: Rebase on top of intel_using_power_well patches.
> 
> v4: This time actually update the PFIT check correctly so that the
> pipe A pfit is in the always-on domain.
> 
> v5: Rebase on top of the VGA power domain addition.
> 
> v6: Rebase on top of the new power domain infrastructure. Also pimp the commit
> message a bit while at it.
> 
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com> (v1)
> Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> ---
>  drivers/gpu/drm/i915/i915_drv.h | 6 +++++-
>  drivers/gpu/drm/i915/intel_pm.c | 5 +++--
>  2 files changed, 8 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 64a3a8c..1a2e967 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -117,6 +117,10 @@ enum intel_display_power_domain {
>  #define HSW_ALWAYS_ON_POWER_DOMAINS (		\
>  	BIT(POWER_DOMAIN_PIPE_A) |		\
>  	BIT(POWER_DOMAIN_TRANSCODER_EDP))
> +#define BDW_ALWAYS_ON_POWER_DOMAINS (		\
> +	BIT(POWER_DOMAIN_PIPE_A) |		\
> +	BIT(POWER_DOMAIN_TRANSCODER_EDP) |	\
> +	BIT(POWER_DOMAIN_PIPE_A_PANEL_FITTER))
>  
>  enum hpd_pin {
>  	HPD_NONE = 0,
> @@ -1802,7 +1806,7 @@ struct drm_i915_file_private {
>  #define HAS_IPS(dev)		(IS_ULT(dev))
>  
>  #define HAS_DDI(dev)		(INTEL_INFO(dev)->has_ddi)
> -#define HAS_POWER_WELL(dev)	(IS_HASWELL(dev))
> +#define HAS_POWER_WELL(dev)	(IS_HASWELL(dev) || IS_GEN8(dev))

IS_BROADWELL() please.

>  #define HAS_FPGA_DBG_UNCLAIMED(dev)	(INTEL_INFO(dev)->has_fpga_dbg)
>  #define HAS_PSR(dev)		(IS_HASWELL(dev))
>  
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 81ec2c3..caf31b7 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -5524,7 +5524,9 @@ static bool is_always_on_power_domain(struct drm_device *dev,
>  
>  	BUG_ON(BIT(domain) & ~POWER_DOMAIN_MASK);
>  
> -	if (IS_HASWELL(dev)) {
> +	if (IS_GEN8(dev)) {

Here too.

> +		always_on_domains = BDW_ALWAYS_ON_POWER_DOMAINS;
> +	} else if (IS_HASWELL(dev)) {
>  		always_on_domains = HSW_ALWAYS_ON_POWER_DOMAINS;
>  	} else {
>  		WARN_ON(1);
> @@ -6010,4 +6012,3 @@ void intel_pm_init(struct drm_device *dev)
>  	INIT_DELAYED_WORK(&dev_priv->rps.delayed_resume_work,
>  			  intel_gen6_powersave_work);
>  }
> -
> -- 
> 1.8.4.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC