[Intel-gfx] [PATCH] drm/i915: flush cursors harder

[Daniel Vetter]

On Mon, Nov 04, 2013 at 06:02:24PM +0200, Ville Syrjälä wrote:
> On Mon, Nov 04, 2013 at 08:13:45AM +0100, Daniel Vetter wrote:
> > Apparently they need the same treatment as primary planes. This fixes
> > modesetting failures because of stuck cursors (!) on Thomas' i830M
> > machine.
> 
> What treatment? Primary planes don't need any extra posting reads AFAIK.

If you look at flush_primary_plane it's definitely there. So I've copied
it over (it's just a real I915_READ, not a posting one).

> 
> > 
> > I've figured while at it I'll also roll it out for the ivb 3 pipe
> > version of this function. I didn't do this for i845/i865 since Bspec
> > says the update mechanism works differently, and there's some
> > additional rules about what can be updated in which order.
> > 
> > Tested-by: Thomas Richter <thor at math.tu-berlin.de>
> 
> I didn't see an explicit note from Thomas saying that he tested it.

It's burried somewhere in the thread, but he said that with the 2 earlier
dvo patches + this one here the lvds-only use-case now works well. Before
that he had issues with the display just showing a cursor and the kernel
complaining about the cursor being stuck in the enabled position when
trying to re-enable it.
-Daniel

> 
> > Cc: stable at vger.kernel.org
> > Cc:  Thomas Richter <thor at math.tu-berlin.de>
> > Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> > ---
> >  drivers/gpu/drm/i915/intel_display.c | 4 ++++
> >  1 file changed, 4 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index f34252d134b6..04d2699f51b4 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -7123,7 +7123,9 @@ static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base)
> >  		intel_crtc->cursor_visible = visible;
> >  	}
> >  	/* and commit changes on next vblank */
> > +	POSTING_READ(CURCNTR(pipe));
> >  	I915_WRITE(CURBASE(pipe), base);
> > +	POSTING_READ(CURBASE(pipe));
> >  }
> >  
> >  static void ivb_update_cursor(struct drm_crtc *crtc, u32 base)
> > @@ -7152,7 +7154,9 @@ static void ivb_update_cursor(struct drm_crtc *crtc, u32 base)
> >  		intel_crtc->cursor_visible = visible;
> >  	}
> >  	/* and commit changes on next vblank */
> > +	POSTING_READ(CURCNTR_IVB(pipe));
> >  	I915_WRITE(CURBASE_IVB(pipe), base);
> > +	POSTING_READ(CURBASE_IVB(pipe));
> >  }
> >  
> >  /* If no-part of the cursor is visible on the framebuffer, then the GPU may hang... */
> > -- 
> > 1.8.4.rc3
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx at lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> -- 
> Ville Syrjälä
> Intel OTC
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch