[Intel-gfx] [PATCH] testcases: Slice Shutdown testscases.

Daniel Vetter daniel at ffwll.ch
Wed Nov 6 08:22:39 CET 2013


On Tue, Nov 05, 2013 at 08:45:09PM -0200, Rodrigo Vivi wrote:
> 1. sysfs half/full switch.
> 4. execbuf without I915_EXEC_USE_PREDICATE
> 5. execbuf with I915_EXEC_USE_PREDICATE
> 
> v2: include more tests and s/GT_FULL/USE_PREDICATE
> v3: make it more reliable and fix few comments
> v4: use number of slices on (1,2) instead of half and full strings.
> 
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi at gmail.com>
> ---
>  tests/Makefile.am |   1 +
>  tests/gt_slices.c | 268 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
>  2 files changed, 269 insertions(+)
>  create mode 100644 tests/gt_slices.c
> 
> diff --git a/tests/Makefile.am b/tests/Makefile.am
> index 0290ae0..e21230a 100644
> --- a/tests/Makefile.am
> +++ b/tests/Makefile.am
> @@ -50,6 +50,7 @@ TESTS_progs_M = \
>  	gem_tiled_blits \
>  	gem_tiled_partial_pwrite_pread \
>  	gem_write_read_ring_switch \
> +	gt_slices \

With the new namimg conventions I'd give this a pm_ prefix.
-Daniel

>  	kms_flip \
>  	kms_render \
>  	kms_setmode \
> diff --git a/tests/gt_slices.c b/tests/gt_slices.c
> new file mode 100644
> index 0000000..8388aca
> --- /dev/null
> +++ b/tests/gt_slices.c
> @@ -0,0 +1,268 @@
> +/*
> + * Copyright © 2013 Intel Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> + * IN THE SOFTWARE.
> + *
> + * Authors:
> + *    Rodrigo Vivi <rodrigo.vivi at intel.com>
> + *
> + */
> +
> +/*
> + * Testcase: Test GT slice shutdown feature
> + *
> + * Sub tests:
> + * 1. sysfs half/full switch.
> + * 4. on execbuf without I915_EXEC_USE_PREDICATE
> + * 5. on execbuf with I915_EXEC_USE_PREDICATE
> + */
> +
> +#define _GNU_SOURCE
> +#include <stdio.h>
> +#include <stdlib.h>
> +#include <string.h>
> +#include <unistd.h>
> +#include "drmtest.h"
> +
> +static void exec(int fd, uint32_t handle, bool use_predicate)
> +{
> +        struct drm_i915_gem_execbuffer2 execbuf;
> +        struct drm_i915_gem_exec_object2 gem_exec[1];
> +        uint32_t b[2] = {MI_BATCH_BUFFER_END};
> +        int loops = 1000000;
> +        int ret = 0;
> +
> +        gem_write(fd, handle, 0, b, sizeof(b));
> +
> +        gem_exec[0].handle = handle;
> +        gem_exec[0].relocation_count = 0;
> +        gem_exec[0].relocs_ptr = 0;
> +        gem_exec[0].alignment = 0;
> +        gem_exec[0].offset = 0;
> +        gem_exec[0].flags = 0;
> +        gem_exec[0].rsvd1 = 0;
> +        gem_exec[0].rsvd2 = 0;
> +
> +        execbuf.buffers_ptr = (uintptr_t)gem_exec;
> +        execbuf.buffer_count = 1;
> +        execbuf.batch_start_offset = 0;
> +        execbuf.batch_len = 8;
> +        execbuf.cliprects_ptr = 0;
> +        execbuf.num_cliprects = 0;
> +        execbuf.DR1 = 0;
> +        execbuf.DR4 = 0;
> +        execbuf.flags =  I915_EXEC_RENDER;
> +	if (use_predicate)
> +		execbuf.flags |= I915_EXEC_USE_PREDICATE;
> +        i915_execbuffer2_set_context_id(execbuf, 0);
> +        execbuf.rsvd2 = 0;
> +
> +        while (loops-- && ret == 0) {
> +                ret = drmIoctl(fd,
> +                               DRM_IOCTL_I915_GEM_EXECBUFFER2,
> +                               &execbuf);
> +        }
> +	gem_sync(fd, handle);
> +}
> +
> +static int slices_on(const int device)
> +{
> +	char *path;
> +	FILE *file;
> +	int ret;
> +	int slices;
> +
> +	ret = asprintf(&path, "/sys/class/drm/card%d/power/gt_slices",
> +		       device);
> +	igt_assert(ret != -1);
> +
> +	file = fopen(path, "r");
> +	igt_require(file);
> +
> +	ret = fscanf(file, "%d", &slices);
> +	igt_assert(ret != 0);
> +
> +	fclose(file);
> +	return slices;
> +}
> +
> +static int set_status(const int device, int slices)
> +{
> +	char *path;
> +	FILE *file;
> +	int ret;
> +	int attempts = 10;
> +
> +	ret = asprintf(&path, "/sys/class/drm/card%d/power/gt_slices",
> +		       device);
> +	igt_assert(ret != -1);
> +
> +	while (attempts-- && ret != 0) {
> +		file = fopen(path, "w");
> +		igt_require(file);
> +		ret = fprintf(file, "%d\n", slices);
> +		igt_assert(ret != -1);
> +		ret = fclose(file);
> +		sleep(1);
> +	}
> +	return ret;
> +}
> +
> +int main(int argc, char **argv)
> +{
> +	char *path;
> +	FILE *file;
> +	unsigned int rc6_enabled;
> +	int i, ret;
> +	uint32_t handle;
> +	const int device = drm_get_card();
> +	const int fd = drm_open_any();
> +	const int devid = intel_get_drm_devid(fd);
> +	int initial = slices_on(device);
> +
> +	igt_skip_on_simulation();
> +
> +	igt_subtest_init(argc, argv);
> +
> +	igt_fixture {
> +		/* On Haswell Slices on/off switch depends on RC6 exit */
> +		ret = asprintf(&path, "/sys/class/drm/card%d/power/rc6_enable",
> +			       device);
> +		igt_assert(ret != -1);
> +
> +		file = fopen(path, "r");
> +		igt_require(file);
> +
> +		fscanf(file, "%u", &rc6_enabled);
> +		fclose(file);
> +
> +		igt_require(IS_HASWELL(devid));
> +		igt_require(rc6_enabled);
> +	}
> +
> +	igt_subtest("sysfs") {
> +		/* Switching states */
> +		if (initial == 1)
> +			ret = set_status(device, 2);
> +		else
> +			ret = set_status(device, 1);
> +		if (ret < 0) {
> +			fprintf(stderr, "Switch states via sysfs failed\n");
> +			igt_fail(ret);
> +		}
> +
> +		igt_success();
> +	}
> +
> +	igt_subtest("execbuf-legacy") {
> +		/* Disable half slices */
> +		ret = set_status(device, 1);
> +		if (ret < 0)
> +			igt_fail(ret);
> +
> +		/* Wait until it is back to half */
> +		for (i = 30; i >= 0 && slices_on(device) == 2; i--) {
> +			if (i == 0)
> +				igt_skip("Took so long to go to half. Probably a legacy support is in use at GPU simutaneously\n");
> +			sleep(1);
> +		}
> +
> +		igt_fork(child, 1) {
> +			/* Start Render without I915_EXEC_USE_PREDICATE */
> +			handle = gem_create(fd, 4096);
> +			exec(fd, handle, false);
> +			gem_close(fd, handle);
> +		}
> +
> +		/* Check if it forces full slices enable for legacy support */
> +		for (i = 10; i >= 0 && slices_on(device) == 1; i--) {
> +			if (i == 0) {
> +				fprintf(stderr, "2 slices should be enabled\n");
> +				igt_fail(-1);
> +			}
> +			sleep(1);
> +		}
> +
> +		/* Wait for idleness */
> +		igt_waitchildren();
> +
> +		/* Check if it is back to half */
> +		for (i = 20; i >= 0 && slices_on(device) == 2; i--) {
> +			if (i == 0) {
> +				fprintf(stderr, "Only 1 slice should be enabled\n");
> +				igt_fail(-1);
> +			}
> +			sleep(1);
> +		}
> +
> +		igt_success();
> +	}
> +
> +	igt_subtest("execbuf-predicate") {
> +		/* Disable half slices */
> +		ret = set_status(device, 1);
> +		if (ret < 0)
> +			igt_fail(ret);
> +
> +		/* Wait until it is back to half */
> +		for (i = 30; i >= 0 && slices_on(device) == 2; i--) {
> +			if (i == 0)
> +				igt_skip("Took so long to go to half. Probably a legacy support is in use at GPU simutaneously\n");
> +			sleep(1);
> +		}
> +
> +		igt_fork(child, 1) {
> +			/* Start Render with I915_EXEC_USE_PREDICATE */
> +			handle = gem_create(fd, 4096);
> +			exec(fd, handle, true);
> +			gem_close(fd, handle);
> +		}
> +
> +		/* Check if it stays with only half slices enabled */
> +		sleep(1);
> +		if (slices_on(device) == 2) {
> +			fprintf(stderr, "Only 1 slice should be enabled during execution with predicate\n");
> +			set_status(device, initial);
> +			igt_fail(-1);
> +		}
> +
> +		/* Wait for idleness */
> +		igt_waitchildren();
> +
> +		/* Check if it is back to half */
> +		for (i = 20; i >= 0 && slices_on(device) == 2; i--) {
> +			if (i == 0) {
> +				fprintf(stderr, "Only 1 slice should be enabled\n");
> +				set_status(device, initial);
> +				igt_fail(-1);
> +			}
> +			sleep(1);
> +		}
> +
> +		set_status(device, initial);
> +		igt_success();
> +	}
> +
> +	igt_fixture {
> +		close(fd);
> +	}
> +
> +	igt_exit();
> +}
> -- 
> 1.7.11.7
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch



More information about the Intel-gfx mailing list