[Intel-gfx] [PATCH 3/3] drm/i915: Export TDR hang count to debugfs

[Siluvery, Arun]

From: "Siluvery, Arun" <arun.siluvery at intel.com>

This patch adds changes to keep track of the number of the times TDR is
triggered and the results for each ring are made available through debugfs.

Signed-off-by: Siluvery, Arun <arun.siluvery at intel.com>
---
 drivers/gpu/drm/i915/i915_debugfs.c | 62 +++++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/i915_drv.h     |  3 ++
 drivers/gpu/drm/i915/i915_irq.c     |  1 +
 3 files changed, 66 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 0e5bcb4..1556346 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2796,6 +2796,67 @@ DEFINE_SIMPLE_ATTRIBUTE(i915_drop_caches_fops,
 			i915_drop_caches_get, i915_drop_caches_set,
 			"0x%08llx\n");
 
+static ssize_t
+i915_ring_hangcheck_read(struct file *filp,
+			char __user *ubuf,
+			size_t max,
+			loff_t *ppos)
+{
+	/* Returns the total number of times the rings
+	 * have hung and been reset since boot */
+	struct drm_device *dev = filp->private_data;
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	char buf[200];
+	int len;
+
+	len = snprintf(buf, sizeof(buf),
+		       "GPU=0x%08X,RCS_T=0x%08X,VCS_T=0x%08X,BCS_T=0x%08X,VECS_T=0x%08X\n",
+		       dev_priv->total_resets,
+		       dev_priv->hangcheck[RCS].tdr_count,
+		       dev_priv->hangcheck[VCS].tdr_count,
+		       dev_priv->hangcheck[BCS].tdr_count,
+		       dev_priv->hangcheck[VECS].tdr_count);
+
+	if (len > sizeof(buf))
+		len = sizeof(buf);
+
+	return simple_read_from_buffer(ubuf, max, ppos, buf, len);
+}
+
+static ssize_t
+i915_ring_hangcheck_write(struct file *filp,
+			const char __user *ubuf,
+			size_t cnt,
+			loff_t *ppos)
+{
+	struct drm_device *dev = filp->private_data;
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	int ret;
+	uint32_t i;
+
+	ret = mutex_lock_interruptible(&dev->struct_mutex);
+	if (ret)
+		return ret;
+
+	for (i = 0; i < I915_NUM_RINGS; i++) {
+		/* Reset the hangcheck counters */
+		dev_priv->hangcheck[i].tdr_count = 0;
+	}
+	dev_priv->total_resets = 0;
+
+	mutex_unlock(&dev->struct_mutex);
+
+	return cnt;
+}
+
+static const struct file_operations i915_ring_hangcheck_fops = {
+	.owner = THIS_MODULE,
+	.open = simple_open,
+	.read = i915_ring_hangcheck_read,
+	.write = i915_ring_hangcheck_write,
+	.llseek = default_llseek,
+};
+
 static int
 i915_max_freq_get(void *data, u64 *val)
 {
@@ -3098,6 +3159,7 @@ static const struct i915_debugfs_files {
 	{"i915_error_state", &i915_error_state_fops},
 	{"i915_next_seqno", &i915_next_seqno_fops},
 	{"i915_display_crc_ctl", &i915_display_crc_ctl_fops},
+	{"i915_ring_hangcheck", &i915_ring_hangcheck_fops},
 };
 
 void intel_display_crc_init(struct drm_device *dev)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index c539509..27225d6 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1347,6 +1347,9 @@ struct intel_hangcheck {
 
 	/* Keep a record of the last time the ring was reset */
 	unsigned long last_reset;
+
+	/* Number of TDR hang detections for this ring */
+	uint32_t tdr_count;
 };
 
 typedef struct drm_i915_private {
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 78b2cbb..378383a 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2517,6 +2517,7 @@ static bool i915_hangcheck_hung(struct intel_hangcheck *hc)
 			DRM_DEBUG_TDR("hung=%d after kick ring\n", hung);
 		}
 		if (hung) {
+			hc->tdr_count++;
 			i915_handle_error(dev, hc);
 		}
 		return hung;
-- 
1.8.4