[Intel-gfx] [PATCH 21/21] drm/i915/bdw: Limit GTT to 2GB
Daniel Vetter
daniel at ffwll.ch
Mon Nov 11 23:58:06 CET 2013
On Thu, Nov 07, 2013 at 09:40:51PM -0800, Ben Widawsky wrote:
> Because of the way in which we're allocating the pages for the Aliasing
> PPGTT, we cannot actually successfully alloc enough space for anything
> greater than 2GB.
>
> Instead of a quick hack to fix this, we should defer until we have the
> real solution in place (allocating much less contiguous space).
>
> This wasn't found sooner because we didn't not have any systems
> supporting more than a 2GB GTT.
>
> Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
I've just slurped in the remaining patchs from this series (with the
exception of the backlight stuff, since that's taken care of already).
-Daniel
> ---
> drivers/gpu/drm/i915/i915_gem_gtt.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 5a3cc31..f69bdc7 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -1239,6 +1239,11 @@ static inline unsigned int gen8_get_total_gtt_size(u16 bdw_gmch_ctl)
> bdw_gmch_ctl &= BDW_GMCH_GGMS_MASK;
> if (bdw_gmch_ctl)
> bdw_gmch_ctl = 1 << bdw_gmch_ctl;
> + if (bdw_gmch_ctl > 4) {
> + WARN_ON(!i915_preliminary_hw_support);
> + return 4<<20;
> + }
> +
> return bdw_gmch_ctl << 20;
> }
>
> --
> 1.8.4.2
>
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--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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