[Intel-gfx] Workaround for flicker with panning on the i830 - found a way for tiled displays

Thomas Richter thor at math.tu-berlin.de
Fri Nov 15 17:08:45 CET 2013


Am 15.11.2013 16:41, schrieb Daniel Vetter:
>
> Gosh, should have read the code more closely. We have a totally botched wm
> setup on i830M - the watermark code for the 2nd pipe is just not there!

(-: Guess that explains something. Just disregard my earlier patch, 
simply superfluous.
In the meantime, I recompiled the code and *decreased* the latency from 
5000 to 3000, then getting a stable image,
even the boot console is then stable (has never been before). Its still 
off by half a screen, but no longer flickering
left and right.

However, what I do not understand about the watermark computation is 
that a *lower* latency results in a *higher* number
of entries in the FIFO. Shouldn't this quite the reverse?
In specific, I do not understand the subtraction in intel_calculate_wm, 
line 1058.

Anyhow, I let you proceed with the patch and I'm ready and happy to test it.

Greetings,
     Thomas






More information about the Intel-gfx mailing list