[Intel-gfx] [PATCH 1/9] drm/i915: Don't set the fence number in DPFC_CTL on SNB

[Chris Wilson]

On Thu, Nov 21, 2013 at 09:29:45PM +0200, ville.syrjala at linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> SNB has another register where the actual FBC CPU fence number is
> stored. The documenation explicitly states that the fence number
> in DPFC_CTL must be 0 on SNB. And in fact when it's not zero,
> the GTT tracking simply doesn't work.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre