[Intel-gfx] [PATCH 1/4] rendercopy/bdw: Fix the STATE_SIP instruction length

[Damien Lespiau]

Signed-off-by: Damien Lespiau <damien.lespiau at intel.com>
---
 lib/rendercopy_gen8.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/lib/rendercopy_gen8.c b/lib/rendercopy_gen8.c
index 660ff03..723f4ef 100644
--- a/lib/rendercopy_gen8.c
+++ b/lib/rendercopy_gen8.c
@@ -470,8 +470,9 @@ gen6_create_scissor_rect(struct intel_batchbuffer *batch)
 }
 
 static void
-gen6_emit_sip(struct intel_batchbuffer *batch) {
-	OUT_BATCH(GEN6_STATE_SIP | 0);
+gen8_emit_sip(struct intel_batchbuffer *batch) {
+	OUT_BATCH(GEN6_STATE_SIP | (3 - 2));
+	OUT_BATCH(0);
 	OUT_BATCH(0);
 }
 
@@ -887,7 +888,7 @@ void gen8_render_copyfunc(struct intel_batchbuffer *batch,
 	 * order */
 	OUT_BATCH(GEN6_PIPELINE_SELECT | PIPELINE_SELECT_3D);
 
-	gen6_emit_sip(batch);
+	gen8_emit_sip(batch);
 
 	gen7_emit_push_constants(batch);
 
-- 
1.8.3.1