[Intel-gfx] [PATCH] drm/i915: use crtc_htotal in watermark calculations to match fastboot v2

Daniel Vetter daniel at ffwll.ch
Wed Nov 27 20:36:09 CET 2013


On Wed, Nov 27, 2013 at 09:12:52PM +0200, Ville Syrjälä wrote:
> On Wed, Nov 27, 2013 at 11:10:26AM -0800, Jesse Barnes wrote:
> > This value is more correct, and matches what we read out in the fastboot
> > code.  Without this, the watermark code will panic after the first mode
> > setting activity after a fastboot.
> > 
> > v2: fix up HSW ->clock usage too (Ville)
> > 
> > Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org>
> 
> Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

I wonder whether we should clear out the entire pipe config after checking
and replace it with the one we've read from the hw state. That would allow
us to catch such fallout with a simple dpms on/off cycle instead of just
fastboot ...

Anyway picked up for -fixes, thanks for the patch (since ugly conflict
otherwise).
-Daniel

> 
> > ---
> >  drivers/gpu/drm/i915/intel_pm.c | 15 ++++++++-------
> >  1 file changed, 8 insertions(+), 7 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index 69cad60..9180562 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -1182,7 +1182,7 @@ static bool g4x_compute_wm0(struct drm_device *dev,
> >  
> >  	adjusted_mode = &to_intel_crtc(crtc)->config.adjusted_mode;
> >  	clock = adjusted_mode->crtc_clock;
> > -	htotal = adjusted_mode->htotal;
> > +	htotal = adjusted_mode->crtc_htotal;
> >  	hdisplay = to_intel_crtc(crtc)->config.pipe_src_w;
> >  	pixel_size = crtc->fb->bits_per_pixel / 8;
> >  
> > @@ -1269,7 +1269,7 @@ static bool g4x_compute_srwm(struct drm_device *dev,
> >  	crtc = intel_get_crtc_for_plane(dev, plane);
> >  	adjusted_mode = &to_intel_crtc(crtc)->config.adjusted_mode;
> >  	clock = adjusted_mode->crtc_clock;
> > -	htotal = adjusted_mode->htotal;
> > +	htotal = adjusted_mode->crtc_htotal;
> >  	hdisplay = to_intel_crtc(crtc)->config.pipe_src_w;
> >  	pixel_size = crtc->fb->bits_per_pixel / 8;
> >  
> > @@ -1500,7 +1500,7 @@ static void i965_update_wm(struct drm_crtc *unused_crtc)
> >  		const struct drm_display_mode *adjusted_mode =
> >  			&to_intel_crtc(crtc)->config.adjusted_mode;
> >  		int clock = adjusted_mode->crtc_clock;
> > -		int htotal = adjusted_mode->htotal;
> > +		int htotal = adjusted_mode->crtc_htotal;
> >  		int hdisplay = to_intel_crtc(crtc)->config.pipe_src_w;
> >  		int pixel_size = crtc->fb->bits_per_pixel / 8;
> >  		unsigned long line_time_us;
> > @@ -1626,7 +1626,7 @@ static void i9xx_update_wm(struct drm_crtc *unused_crtc)
> >  		const struct drm_display_mode *adjusted_mode =
> >  			&to_intel_crtc(enabled)->config.adjusted_mode;
> >  		int clock = adjusted_mode->crtc_clock;
> > -		int htotal = adjusted_mode->htotal;
> > +		int htotal = adjusted_mode->crtc_htotal;
> >  		int hdisplay = to_intel_crtc(enabled)->config.pipe_src_w;
> >  		int pixel_size = enabled->fb->bits_per_pixel / 8;
> >  		unsigned long line_time_us;
> > @@ -1778,7 +1778,7 @@ static bool ironlake_compute_srwm(struct drm_device *dev, int level, int plane,
> >  	crtc = intel_get_crtc_for_plane(dev, plane);
> >  	adjusted_mode = &to_intel_crtc(crtc)->config.adjusted_mode;
> >  	clock = adjusted_mode->crtc_clock;
> > -	htotal = adjusted_mode->htotal;
> > +	htotal = adjusted_mode->crtc_htotal;
> >  	hdisplay = to_intel_crtc(crtc)->config.pipe_src_w;
> >  	pixel_size = crtc->fb->bits_per_pixel / 8;
> >  
> > @@ -2471,8 +2471,9 @@ hsw_compute_linetime_wm(struct drm_device *dev, struct drm_crtc *crtc)
> >  	/* The WM are computed with base on how long it takes to fill a single
> >  	 * row at the given clock rate, multiplied by 8.
> >  	 * */
> > -	linetime = DIV_ROUND_CLOSEST(mode->htotal * 1000 * 8, mode->clock);
> > -	ips_linetime = DIV_ROUND_CLOSEST(mode->htotal * 1000 * 8,
> > +	linetime = DIV_ROUND_CLOSEST(mode->crtc_htotal * 1000 * 8,
> > +				     mode->crtc_clock);
> > +	ips_linetime = DIV_ROUND_CLOSEST(mode->crtc_htotal * 1000 * 8,
> >  					 intel_ddi_get_cdclk_freq(dev_priv));
> >  
> >  	return PIPE_WM_LINETIME_IPS_LINETIME(ips_linetime) |
> > -- 
> > 1.8.4.2
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx at lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> -- 
> Ville Syrjälä
> Intel OTC
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch



More information about the Intel-gfx mailing list