[Intel-gfx] [PATCH] drm/i915: add intel_display_power_enabled_sw() for use in atomic ctx

[Daniel Vetter]

On Thu, Nov 28, 2013 at 11:50:33AM -0200, Paulo Zanoni wrote:
> 2013/11/27 Imre Deak <imre.deak at intel.com>:
> > Atm we call intel_display_power_enabled() from
> > i915_capture_error_state() in IRQ context and then take a mutex. To fix
> > this add a new intel_display_power_enabled_sw() which returns the domain
> > state based on software tracking as opposed to reading the actual HW
> > state.
> >
> > Since we use domain_use_count for this without locking on the reader
> > side make sure we increase the counter only after enabling all required
> > power wells and decrease it before disabling any of these power wells.
> >
> > Regression introduced in
> > commit 1b02383464b4a915627ef3b8fd0ad7f07168c54c
> > Author: Imre Deak <imre.deak at intel.com>
> > Date:   Tue Sep 24 16:17:09 2013 +0300
> >
> >     drm/i915: support for multiple power wells
> >
> > Note that atm we depend on the value returned by
> > intel_display_power_enabled_sw() in i915_capture_error_state() to avoid
> > unclaimed register access reports. This was never guaranteed though,
> > since another thread can disable the power concurrently. If this is a
> > problem we need another explicit way to disable the reporting during
> > error captures.
> >
> > v2:
> > - remove barriers as the caller can't depend on the value
> >   returned from i915_capture_error_state_sw() anyway (Ville)
> > - dump the state of pipe/transcoder power domain state (Daniel)
> >
> > Reported-by: Chris Wilson <chris at chris-wilson.co.uk>
> > Signed-off-by: Imre Deak <imre.deak at intel.com>
> 
> 
> Makes sense to me. Reviewed-by: Paulo Zanoni <paulo.r.zanoni at intel.com>

Queued for -next, thanks for the patch.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch