[Intel-gfx] [PATCH 8/8] drm/i915: Determine the stolen memory base address on gen2

[ville.syrjala at linux.intel.com]

From: Ville Syrjälä <ville.syrjala at linux.intel.com>

There doesn't seem to an explicit stolen memory base register on gen2.
Some old comment in the code suggests we should get it via
max_low_pfn_mapped, but that's clearly a bad idea on my MGM.

The e820 map in said machine looks like this:
[    0.000000] BIOS-e820: [mem 0x0000000000000000-0x000000000009f7ff] usable
[    0.000000] BIOS-e820: [mem 0x000000000009f800-0x000000000009ffff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000000ce000-0x00000000000cffff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000000dc000-0x00000000000fffff] reserved
[    0.000000] BIOS-e820: [mem 0x0000000000100000-0x000000001f6effff] usable
[    0.000000] BIOS-e820: [mem 0x000000001f6f0000-0x000000001f6f7fff] ACPI data
[    0.000000] BIOS-e820: [mem 0x000000001f6f8000-0x000000001f6fffff] ACPI NVS
[    0.000000] BIOS-e820: [mem 0x000000001f700000-0x000000001fffffff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000fec10000-0x00000000fec1ffff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000ffb00000-0x00000000ffbfffff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000fff00000-0x00000000ffffffff] reserved

That makes max_low_pfn_mapped = 1f6f0000, so assuming our stolen memory
would start there would place it on top of some ACPI memory regions.
So not a good idea as already stated.

The 9MB region after the ACPI regions at 0x1f700000 however looks
promising given that the macine reports the stolen memory size to be
8MB. Looking at the PGTBL_CTL register, the GTT entries are at offset
0x1fee00000, and given that the GTT entries occupy 128KB, it looks like
the stolen memory could start at 0x1f700000 and the GTT entries would
occupy the last 128KB of the stolen memory. I have no idea about the
extra 1MB after the GTT entries.

I tested this on the machine in question, and so far I've not seen any
issues. Hopefully the same rules hold for all gen2 machines...

On i830 w/ local memory, stolen memory is replaced by the local memory.
In this case the page table is stored in local memory. Since the local
memory starts at offset 0, we can add an extra sanity check to make sure
the page table is really stored at the end of local memory.

Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
---
 drivers/gpu/drm/i915/i915_gem_stolen.c | 36 ++++++++++++++++++++++++----------
 1 file changed, 26 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
index 39e6404..407a9fa 100644
--- a/drivers/gpu/drm/i915/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
@@ -51,13 +51,10 @@ static unsigned long i915_stolen_to_physical(struct drm_device *dev)
 	/* Almost universally we can find the Graphics Base of Stolen Memory
 	 * at offset 0x5c in the igfx configuration space. On a few (desktop)
 	 * machines this is also mirrored in the bridge device at different
-	 * locations, or in the MCHBAR. On gen2, the layout is again slightly
-	 * different with the Graphics Segment immediately following Top of
-	 * Memory (or Top of Usable DRAM). Note it appears that TOUD is only
-	 * reported by 865g, so we just use the top of memory as determined
-	 * by the e820 probe.
+	 * locations, or in the MCHBAR.
 	 *
-	 * XXX However gen2 requires an unavailable symbol.
+	 * Gen2 stolen base is tricky. Try to deduce it from the
+	 * page table base address.
 	 */
 	base = 0;
 	if (INTEL_INFO(dev)->gen >= 3) {
@@ -65,10 +62,29 @@ static unsigned long i915_stolen_to_physical(struct drm_device *dev)
 		pci_read_config_dword(dev->pdev, 0x5c, &base);
 		base &= ~((1<<20) - 1);
 	} else { /* GEN2 */
-#if 0
-		/* Stolen is immediately above Top of Memory */
-		base = max_low_pfn_mapped << PAGE_SHIFT;
-#endif
+		u32 pgtbl_ctl = I915_READ(I810_PGTBL_CTL);
+
+		/* GTT disabled? */
+		if (!(pgtbl_ctl & I810_PGTBL_ENABLED)) {
+			dev_priv->gtt.has_local_memory = false;
+			return 0;
+		}
+
+		pgtbl_ctl &= I810_PGTBL_ADDRESS_MASK;
+
+		/*
+		 * Assume GTT entries occupy the last 128KB of stolen/local memory.
+		 * The 128KB should already be deducted from stolen_size by this
+		 * time.
+		 */
+		base = pgtbl_ctl - dev_priv->gtt.stolen_size;
+
+		if (WARN(dev_priv->gtt.has_local_memory && base != 0,
+			 "IGD page table address (0x%x) vs. local memory size (%zu) mismatch\n",
+			 pgtbl_ctl, dev_priv->gtt.stolen_size)) {
+			dev_priv->gtt.has_local_memory = false;
+			return 0;
+		}
 	}
 
 	if (base == 0)
-- 
1.8.3.2