[Intel-gfx] [PATCH] [v3] drm/i915: Clean up the ring scaling calculations
Daniel Vetter
daniel at ffwll.ch
Wed Oct 2 18:56:43 CEST 2013
On Wed, Oct 02, 2013 at 09:36:04AM -0700, Jesse Barnes wrote:
> On Wed, 2 Oct 2013 09:25:02 -0700
> Ben Widawsky <benjamin.widawsky at intel.com> wrote:
>
> > This patch attempts to clean up the ring/IA scaling programming in the
> > following ways.
> > 1. Fix the comment about the DDR frequency. The math is 266MHz, not
> > 133MHz. Formula was right, docs are wrong.
> >
> > 2. Mask the DCLK register since I don't know how it is defined on future
> > platforms.
> >
> > 3. use mult_frac instead of magic math.
> >
> > This helps for future platform enabling.
> >
> > v2: Actually use the right patch. The v1 was a mix of things, none of
> > which was right. Note that due to rounding, we actually get different
> > values (slightly higher) for the effective ring frequency.
> >
> > v3: Use 1.25 instead of 1.33 as the original code did. (Jesse)
> >
> > CC: Jesse Barnes <jbarnes at virtuousgeek.org>
> > CC: Chris Wilson <chris at chris-wilson.co.uk>
> > Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
> > ---
> > drivers/gpu/drm/i915/intel_pm.c | 8 ++++----
> > 1 file changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index 698257c..9753bd9 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -3663,9 +3663,9 @@ void gen6_update_ring_freq(struct drm_device *dev)
> > /* Convert from kHz to MHz */
> > max_ia_freq /= 1000;
> >
> > - min_ring_freq = I915_READ(MCHBAR_MIRROR_BASE_SNB + DCLK);
> > - /* convert DDR frequency from units of 133.3MHz to bandwidth */
> > - min_ring_freq = (2 * 4 * min_ring_freq + 2) / 3;
> > + min_ring_freq = I915_READ(MCHBAR_MIRROR_BASE_SNB + DCLK) & 0xf;
> > + /* convert DDR frequency from units of 266.6MHz to bandwidth */
> > + min_ring_freq = mult_frac(min_ring_freq, 8, 3);
> >
> > /*
> > * For each potential GPU frequency, load a ring frequency we'd like
> > @@ -3678,7 +3678,7 @@ void gen6_update_ring_freq(struct drm_device *dev)
> > unsigned int ia_freq = 0, ring_freq = 0;
> >
> > if (IS_HASWELL(dev)) {
> > - ring_freq = (gpu_freq * 5 + 3) / 4;
> > + ring_freq = mult_frac(gpu_freq, 5, 4);
> > ring_freq = max(min_ring_freq, ring_freq);
> > /* leave ia_freq as the default, chosen by cpufreq */
> > } else {
>
> Reviewed-by: Jesse Barnes <jbarnes at virtuousgeek.org>
Queued for -next, thanks for the patch.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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