[Intel-gfx] [PATCH 03/12] drm/i915: Reduce the time we hold struct mutex in sprite update_plane code

[Daniel Vetter]

On Fri, Oct 04, 2013 at 01:40:08PM +0300, Ville Syrjälä wrote:
> On Fri, Oct 04, 2013 at 11:21:20AM +0100, Chris Wilson wrote:
> > On Tue, Oct 01, 2013 at 06:02:12PM +0300, ville.syrjala at linux.intel.com wrote:
> > > From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > > 
> > > We used to call the entire intel specific update_plane hook while
> > > holding struct_mutex. Actually we only need to hold struct_mutex while
> > > pinning/unpinning the obj. The plane state itself is protected by the
> > > kms locks, and as the object is pinned we can dig out the offset and
> > > tiling information from it without fearing that it would change
> > > underneath us.
> > > 
> > > So now we don't need to drop and reacquire the lock around the
> > > wait_for_vblank. Also we will need another wait_for_vblank in the IVB
> > > specific update_plane hook, and this way we don't need to worry about
> > > struct_mutex there either.
> > > 
> > > Also move the intel_plane->obj=NULL assignment outside strut_mutex in
> > > disable_plane to make it clear that it's not protected by struct_mutex.
> > 
> > intel_update_fbc() needs to be taken out and shot. It needs the mode
> > lock, crtc lock and the struct_mutex.
> > 
> > This patch looks fine, but anything touching fbc just makes me want to
> > curl up in a corner and whimper. Friends don't let friends enable fbc!
> 
> Yeah, I have to fight the urge to beat that guy into shape every time I
> come across it. I fear it's going to be another rathole, which is why
> I'm trying to hold off until I've managed to clear my board of other
> tasks a bit.

Wrt cleaning up the fbc rathole (and it's one, same applies to psr btw):
We need to have some illusion of testcases first:
- Checks that screen updates work using the crc stuff.
- Functional checks that we actually enter psr/use compressed buffers. And
  they _must_ fail if QA botches their setup somehow (not like the current
  pc8+ test which is too polite and just skips).
- Integration into the pipe config and plane config stuff for atomic
  modesets and nuclear pageflips and what not else.

This can easily cost us a few souls I think ;-)

Cheers, Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch