[Intel-gfx] Questions on display pipes on 835GM

[Daniel Vetter]

On Sat, Oct 5, 2013 at 6:47 PM, Thomas Richter <thor at math.tu-berlin.de> wrote:
>
>> The CRT port can only be driven by pipe A, so I think that explains why
>> your hacks may go bad when a CRT monitor is used.
>
>
> Understood, this makes sense. Thus, DVO would then be at pipe B. How is this
> switch made, and where? There need to be a register somewhere that tells the
> i835 which signal goes where.

If the intel_connector->base.encoder pointer is non-NULL, then you can
get at the pipe throught
to_intel_crtc(intel_connector->base.encoder->crtc)->pipe. If this
pointer doesn't exist then the dvo chip shouldn't be in use at the
moment.

For intel_encoder you can chase
to_intel_crtc(intel_encoder->base.crtc)->pipe, but you first need to
check the crtc pointer for non-NULL.

btw you can check whether pipe B works without a 2nd display
potentially wreaking havoc (so should be simpler to debug) with:

xrandr --output LVDS --crtc 1 --auto

Cheers, Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch