[Intel-gfx] [PATCH 1/4] drm/i915: check that the i965g/gm 4G limit is really obeyed

[Daniel Vetter]

On Tue, Oct 08, 2013 at 12:06:24PM +0100, Damien Lespiau wrote:
> On Mon, Oct 07, 2013 at 05:15:45PM -0300, Rodrigo Vivi wrote:
> > From: Daniel Vetter <daniel.vetter at ffwll.ch>
> > 
> > In truly crazy circumstances shmem might give us the wrong type of
> > page. So be a bit paranoid and double check this.
> > 
> > Reviewer: Damien Lespiau <damien.lespiau at intel.com>
> > Cc: Rob Clark <robdclark at gmail.com>
> > References: http://lkml.org/lkml/2011/7/11/238
> > Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi at gmail.com>
> > ---
> >  drivers/gpu/drm/i915/i915_gem.c | 3 +++
> >  1 file changed, 3 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> > index 19ecfa8..692ebf7 100644
> > --- a/drivers/gpu/drm/i915/i915_gem.c
> > +++ b/drivers/gpu/drm/i915/i915_gem.c
> > @@ -1903,6 +1903,9 @@ i915_gem_object_get_pages_gtt(struct drm_i915_gem_object *obj)
> >  			sg->length += PAGE_SIZE;
> >  		}
> >  		last_pfn = page_to_pfn(page);
> > +
> > +		/* Check that the i965g/gm workaround works. */
> > +		WARN_ON((gfp & __GFP_DMA32) && (last_pfn >= 0x00100000UL));
> 
> I guess we could have something like last_pfn >= (GB(4) >> PAGE_SHIFT)
> but in any case:

I was lazy - this is copypasta from gma500 ...
> 
> Reviewed-by: Damien Lespiau <damien.lespiau at intel.com>

Queued for -next, thanks for the review.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch