[Intel-gfx] [PATCH 1/2] drm/i915: don't save/restore CACHE_MODE_0 on gen7+
Paulo Zanoni
przanoni at gmail.com
Fri Oct 11 22:09:57 CEST 2013
2013/10/11 Jesse Barnes <jbarnes at virtuousgeek.org>:
> On gen7+, CACHE_MODE_0 moved, so we're clobbering some other reg rather
> than restoring CACHE_MODE_0. Don't do that.
>
> Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
> ---
> drivers/gpu/drm/i915/i915_suspend.c | 7 +++++--
> 1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
> index 97ca8f1..98790c7 100644
> --- a/drivers/gpu/drm/i915/i915_suspend.c
> +++ b/drivers/gpu/drm/i915/i915_suspend.c
> @@ -398,7 +398,8 @@ int i915_save_state(struct drm_device *dev)
> intel_disable_gt_powersave(dev);
>
> /* Cache mode state */
> - dev_priv->regfile.saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0);
> + if (INTEL_INFO(dev)->gen < 7)
> + dev_priv->regfile.saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0);
>
> /* Memory Arbitration state */
> dev_priv->regfile.saveMI_ARB_STATE = I915_READ(MI_ARB_STATE);
> @@ -447,7 +448,9 @@ int i915_restore_state(struct drm_device *dev)
> }
>
> /* Cache mode state */
> - I915_WRITE(CACHE_MODE_0, dev_priv->regfile.saveCACHE_MODE_0 | 0xffff0000);
> + if (INTEL_INFO(dev)->gen < 7)
> + I915_WRITE(CACHE_MODE_0, dev_priv->regfile.saveCACHE_MODE_0 |
> + 0xffff0000);
>
> /* Memory arbitration state */
> I915_WRITE(MI_ARB_STATE, dev_priv->regfile.saveMI_ARB_STATE | 0xffff0000);
> --
> 1.8.3.1
>
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--
Paulo Zanoni
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