[Intel-gfx] [PATCH 0/2] drm/i915: Gen2 vblank stuff
Daniel Vetter
daniel at ffwll.ch
Mon Oct 14 17:23:21 CEST 2013
On Mon, Oct 14, 2013 at 11:01:11AM +0100, Chris Wilson wrote:
> On Fri, Oct 11, 2013 at 09:52:42PM +0300, ville.syrjala at linux.intel.com wrote:
> > Continuing a bit with improving the vblank timestamp stuff, I decided that
> > it's also time to fix gen2 properly.
> >
> > All this time we've been pretending it has the same pixel+frame counter that
> > gen3 and gen4 have, when in fact it doesn't. Luckily the same offset has
> > nothing else on gen2, so it has just read out as 0 and everything more or
> > less worked.
> >
> > Sadly there doesn't seem to be any frame counter register on gen2. For the
> > scanout position, DSL + additional tricks works equally well for gen2 as
> > it does for ctg+.
>
> Confirmed the absence of said registers, so
> Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
Both merged, thanks for patches&review.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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