[Intel-gfx] [PATCH 12/16] drm/i915: Fix PIPE_CRC_CTL for vlv

[Ville Syrjälä]

On Wed, Oct 16, 2013 at 10:55:57PM +0200, Daniel Vetter wrote:
> The PIPE_B #define was missing the display mmio offset. Use the
> _PIPE_INC macro instead, it's simpler.
> 
> Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> ---
>  drivers/gpu/drm/i915/i915_reg.h | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index ad8fe21..4e0f0b7 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -1887,14 +1887,13 @@
>  #define _PIPE_CRC_RES_RES2_A_G4X	(dev_priv->info->display_mmio_offset + 0x60080)
>  
>  /* Pipe B CRC regs */
> -#define _PIPE_CRC_CTL_B			0x61050
>  #define _PIPE_CRC_RES_1_B_IVB		0x61064
>  #define _PIPE_CRC_RES_2_B_IVB		0x61068
>  #define _PIPE_CRC_RES_3_B_IVB		0x6106c
>  #define _PIPE_CRC_RES_4_B_IVB		0x61070
>  #define _PIPE_CRC_RES_5_B_IVB		0x61074

Maybe use _PIPE_INC() for these IVB regs as well. They're the only CRC
regs left using _PIPE(), so they feel a bit out of place.

>  
> -#define PIPE_CRC_CTL(pipe)	_PIPE(pipe, _PIPE_CRC_CTL_A, _PIPE_CRC_CTL_B)
> +#define PIPE_CRC_CTL(pipe)	_PIPE_INC(pipe, _PIPE_CRC_CTL_A, 0x01000)
>  #define PIPE_CRC_RES_1_IVB(pipe)	\
>  	_PIPE(pipe, _PIPE_CRC_RES_1_A_IVB, _PIPE_CRC_RES_1_B_IVB)
>  #define PIPE_CRC_RES_2_IVB(pipe)	\
> -- 
> 1.8.4.rc3
> 
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-- 
Ville Syrjälä
Intel OTC