[Intel-gfx] [RFC 0/6] Haswell runtime PM support + D3

[Paulo Zanoni]

From: Paulo Zanoni <paulo.r.zanoni at intel.com>

Hi

This RFC series adds runtime PM support on Haswell. The current implementation
puts the device in the PCI D3cold state when we decide to sleep. It uses the
same refcount+timeout idea from the PC8 code, but now through the Kernel runtime
PM infrastructure.

I saw Jesse and Imre are still playing with the power wells on Baytrail, so I
thought maybe they would take some time to do the whole D3 + runtime_pm thing,
so I decided to ressurrect some code I had, test it and send anyway.

The basic idea of this series is that it adds some functions that should be
reused when we add support for other platforms, but OTOH it completely relies on
the already-implemented PC8 support for saving+restoring everything on Haswell.
So even though the code is ready for Haswell, it's not ready for !Haswell.

So we'll only reach the zero refcount after we enable PC8, and we'll increment
the refcount just before disabling PC8. I thought we would need more register
save-restore code, but it seems the current save-restore code from PC8 is enough
to keep everything going. All I needed was to add some more put/get calls to
keep the device awake when needed.

Now here's the reason why this is still an RFC: I just added put/get calls to
the places I spotted problems while doing my basic tests. I basically tested
runtime PM while running Gnome and Xfce, and I also tested sysfs and debugfs. I
still didn't write the full test suite I've been promising to write: this will
be my next step. OTOH, the runtime PM support is disabled by default, so merging
these patches shouldn't really hurt.

But our driver has so many entry points that I just don't think we'll ever be
confident that we always wake up from D3 when needed, and I don't think we'll be
able to write a single test case that tests everything. So I fear this feature
will be just like the "unclaimed register" checking code: we'll be stuck on a
break-bisect-fix loop forever. And considering most people won't ever run the
runtime PM code, we may stay long periods of time without noticing the broken
state.

When we add support for BYT and other platforms we will have to rearrange the
PC8 code so that we move some things out of it to some common PM infrastructure
(i.e, dev_priv->pm). The first things I can think of are the code that counts
the current number of used CRTCs and the code that handles pc8.gpu_idle.

The interfaces for configuring the runtime PM support are the standard runtime
PM interfaces. Go to /sys/bus/pci/devices/0000\:00\:02.0/power/ and have some
fun. I suggest you to "echo 5 > autosuspend_delay_ms" and boot with
"i915.pc8_timeout=5" if you really want to test things.

Another thing which we could discuss is if we really want to keep PC8 and D3 as
separate features. Today they're separate features, where D3 is a "deeper" step
that can be disabled while PC8 is still enabled. This creates the problem that
we need to separately test/validate PC8-only and PC8+D3 (and possibly D3-only in
the future, depending on how we rearrange code). Since I can't really think of a
case where we would want PC8 but not D3, maybe we should kill the "PC8 without
D3" option.

Opinions? Bikesheds? Does this really looks like it can be resued on BYT? Jesse?
Imre?

Thanks,
Paulo

Paulo Zanoni (6):
  drm/i915: add initial Runtime PM functions
  drm/i915: do adapter power state notification at runtime PM
  drm/i915: add enable_runtime_pm option
  drm/i915: add runtime put/get calls at the basic places
  drm/i915: add some runtime PM get/put calls
  drm/i915: add runtime PM support on Haswell

 drivers/gpu/drm/i915/i915_debugfs.c        | 46 ++++++++++++++++++++++++--
 drivers/gpu/drm/i915/i915_dma.c            | 38 +++++++++++++++++++++
 drivers/gpu/drm/i915/i915_drv.c            | 48 +++++++++++++++++++++++++++
 drivers/gpu/drm/i915/i915_drv.h            |  8 +++++
 drivers/gpu/drm/i915/i915_gem.c            | 53 +++++++++++++++++++-----------
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |  6 ++++
 drivers/gpu/drm/i915/i915_irq.c            |  6 ++++
 drivers/gpu/drm/i915/i915_sysfs.c          | 14 ++++++--
 drivers/gpu/drm/i915/intel_display.c       |  4 +++
 drivers/gpu/drm/i915/intel_dp.c            | 11 +++++--
 drivers/gpu/drm/i915/intel_drv.h           |  2 ++
 drivers/gpu/drm/i915/intel_panel.c         |  9 ++++-
 drivers/gpu/drm/i915/intel_pm.c            | 26 +++++++++++++++
 drivers/gpu/drm/i915/intel_uncore.c        | 13 ++++++++
 14 files changed, 257 insertions(+), 27 deletions(-)

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1.8.3.1