[Intel-gfx] [RFC 6/6] drm/i915: add runtime PM support on Haswell

Paulo Zanoni przanoni at gmail.com
Tue Oct 22 21:30:14 CEST 2013

From: Paulo Zanoni <paulo.r.zanoni at intel.com>

The code to enable/disable PC8 already takes care of saving and
restoring all the registers we need to save/restore, so do a put()
call when we enable PC8 and a get() call when we disable it.

Ideally, in order to make it easier to add runtime PM support to other
platforms, we should move some things from the PC8 code to the runtime
PM code, but let's do this later, since we can make Haswell work right

Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
 drivers/gpu/drm/i915/i915_drv.h      | 2 +-
 drivers/gpu/drm/i915/intel_display.c | 4 ++++
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 73ebb9e..31008c4 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1785,7 +1785,7 @@ struct drm_i915_file_private {
 #define HAS_POWER_WELL(dev)	(IS_HASWELL(dev))
 #define HAS_FPGA_DBG_UNCLAIMED(dev)	(INTEL_INFO(dev)->has_fpga_dbg)
 #define HAS_PSR(dev)		(IS_HASWELL(dev))
-#define HAS_RUNTIME_PM(dev)	false
+#define HAS_RUNTIME_PM(dev)	(IS_HASWELL(dev))
 #define INTEL_PCH_DEVICE_ID_MASK		0xff00
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 3e79a2a..02d1067 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6417,6 +6417,8 @@ void hsw_enable_pc8_work(struct work_struct *__work)
 	hsw_disable_lcpll(dev_priv, true, true);
+	intel_runtime_pm_put(dev_priv);
 static void __hsw_enable_package_c8(struct drm_i915_private *dev_priv)
@@ -6452,6 +6454,8 @@ static void __hsw_disable_package_c8(struct drm_i915_private *dev_priv)
 	DRM_DEBUG_KMS("Disabling package C8+\n");
+	intel_runtime_pm_get(dev_priv);

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