[Intel-gfx] [PATCH 2/4] drm/i915: Remove WaFbcDisableDpfcClockGating on HSW

[Paulo Zanoni]

2013/10/24 Ben Widawsky <benjamin.widawsky at intel.com>:
> Production HSW does not need it. I confirmed this with Art.
>
> Signed-off-by: Ben Widawsky <ben at bwidawsk.net>

I just hope these things don't start uncovering bugs :)

Reviewed-by: Paulo Zanoni <paulo.r.zanoni at intel.com>

> ---
>  drivers/gpu/drm/i915/i915_reg.h |  3 ---
>  drivers/gpu/drm/i915/intel_pm.c | 10 ----------
>  2 files changed, 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 6c98238..6799d53 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -1110,9 +1110,6 @@
>                                              _HSW_PIPE_SLICE_CHICKEN_1_A, + \
>                                              _HSW_PIPE_SLICE_CHICKEN_1_B)
>
> -#define HSW_CLKGATE_DISABLE_PART_1     0x46500
> -#define   HSW_DPFC_GATING_DISABLE      (1<<23)
> -
>  /*
>   * GPIO regs
>   */
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 33ad028..686699c 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -254,12 +254,6 @@ static void ironlake_disable_fbc(struct drm_device *dev)
>                 dpfc_ctl &= ~DPFC_CTL_EN;
>                 I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl);
>
> -               if (IS_HASWELL(dev))
> -                       /* WaFbcDisableDpfcClockGating:hsw */
> -                       I915_WRITE(HSW_CLKGATE_DISABLE_PART_1,
> -                                  I915_READ(HSW_CLKGATE_DISABLE_PART_1) &
> -                                  ~HSW_DPFC_GATING_DISABLE);
> -
>                 DRM_DEBUG_KMS("disabled FBC\n");
>         }
>  }
> @@ -293,10 +287,6 @@ static void gen7_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
>                 /* WaFbcAsynchFlipDisableFbcQueue:hsw */
>                 I915_WRITE(HSW_PIPE_SLICE_CHICKEN_1(intel_crtc->pipe),
>                            HSW_BYPASS_FBC_QUEUE);
> -               /* WaFbcDisableDpfcClockGating:hsw */
> -               I915_WRITE(HSW_CLKGATE_DISABLE_PART_1,
> -                          I915_READ(HSW_CLKGATE_DISABLE_PART_1) |
> -                          HSW_DPFC_GATING_DISABLE);
>         }
>
>         I915_WRITE(SNB_DPFC_CTL_SA,
> --
> 1.8.4.1
>
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-- 
Paulo Zanoni