[Intel-gfx] [PATCH 00/11] drm/i915: adjusted_mode.clock vs. port_clock v3

ville.syrjala at linux.intel.com ville.syrjala at linux.intel.com
Fri Sep 6 22:28:57 CEST 2013


Another day, another attempt.

This series replaces the earlier attempt:
[PATCH 0/8] drm/i915: adjusted_mode.clock vs. port_clock v2 

The main new idea is to make it the encoders' responsibility to calculate
adjusted_mode.clock. In order to do that I had to add DP M/N extraction and
i9xx_crtc_clock_get() had to be improved so that it can dig out the PCH DPLL
frequency. The rest is more or less the same old.

As a bonus we now get to cross check the FDI's idea of dotclock against the
encoder's idea.

Also now CTG too can calculate the dotclock from the DP port_clock. I don't
think that could have worked before as the DPLL was running at the DP link
frequency, so we read that out into adjusted_mode.clock and then compared
it with whatever the user requested. Not the same thing at all. But now it
should just work (tm).

I gave it a quick whirl on my ILK eDP + DP, and IVB HDMI and DP. Neither
machine started to yell at me, so I think it's in a semi-decent shape at
least. Unfortunately I don't have a CTG w/ DP so I can't test that part,
nor do I have any SDVO/DVO hardware.



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