[Intel-gfx] [PATCH v2 08/14] drm/i915: Make intel_crtc_active() available outside intel_pm.c
Damien Lespiau
damien.lespiau at intel.com
Tue Sep 10 18:43:40 CEST 2013
On Wed, Sep 04, 2013 at 06:25:25PM +0300, ville.syrjala at linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
> Move intel_crtc_active() to intel_display.c and make it available
> elsewhere as well.
>
> intel_edp_psr_match_conditions() already has one open coded copy,
> so replace that one with a call to intel_crtc_active().
>
> v2: Copy paste a big comment from danvet's mail explaining
> when we can ditch the extra checks
>
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau at intel.com>
--
Damien
> ---
> drivers/gpu/drm/i915/intel_display.c | 17 +++++++++++++++++
> drivers/gpu/drm/i915/intel_dp.c | 3 +--
> drivers/gpu/drm/i915/intel_drv.h | 1 +
> drivers/gpu/drm/i915/intel_pm.c | 11 -----------
> 4 files changed, 19 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index fd67758..71c7763 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -733,6 +733,23 @@ vlv_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc,
> return true;
> }
>
> +bool intel_crtc_active(struct drm_crtc *crtc)
> +{
> + struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> +
> + /* Be paranoid as we can arrive here with only partial
> + * state retrieved from the hardware during setup.
> + *
> + * We can ditch the adjusted_mode.clock check as soon
> + * as Haswell has gained clock readout/fastboot support.
> + *
> + * We can ditch the crtc->fb check as soon as we can
> + * properly reconstruct framebuffers.
> + */
> + return intel_crtc->active && crtc->fb &&
> + intel_crtc->config.adjusted_mode.clock;
> +}
> +
> enum transcoder intel_pipe_to_cpu_transcoder(struct drm_i915_private *dev_priv,
> enum pipe pipe)
> {
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 3f0dd65..87b03b2 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -1570,8 +1570,7 @@ static bool intel_edp_psr_match_conditions(struct intel_dp *intel_dp)
> }
>
> intel_crtc = to_intel_crtc(crtc);
> - if (!intel_crtc->active || !crtc->fb ||
> - !intel_crtc->config.adjusted_mode.clock) {
> + if (!intel_crtc_active(crtc)) {
> DRM_DEBUG_KMS("crtc not active for PSR\n");
> dev_priv->no_psr_reason = PSR_CRTC_NOT_ACTIVE;
> return false;
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index dbf04be..59f0ec7 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -801,5 +801,6 @@ extern void hsw_pc8_disable_interrupts(struct drm_device *dev);
> extern void hsw_pc8_restore_interrupts(struct drm_device *dev);
> extern void intel_aux_display_runtime_get(struct drm_i915_private *dev_priv);
> extern void intel_aux_display_runtime_put(struct drm_i915_private *dev_priv);
> +extern bool intel_crtc_active(struct drm_crtc *crtc);
>
> #endif /* __INTEL_DRV_H__ */
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 397628b..3ba412c 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -43,17 +43,6 @@
> * i915.i915_enable_fbc parameter
> */
>
> -static bool intel_crtc_active(struct drm_crtc *crtc)
> -{
> - struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> -
> - /* Be paranoid as we can arrive here with only partial
> - * state retrieved from the hardware during setup.
> - */
> - return intel_crtc->active && crtc->fb &&
> - intel_crtc->config.adjusted_mode.clock;
> -}
> -
> static void i8xx_disable_fbc(struct drm_device *dev)
> {
> struct drm_i915_private *dev_priv = dev->dev_private;
> --
> 1.8.1.5
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
More information about the Intel-gfx
mailing list