[Intel-gfx] [PATCH 07/11] drm/i915: Make i9xx_crtc_clock_get() use dpll_hw_state

Jani Nikula jani.nikula at linux.intel.com
Fri Sep 13 14:40:55 CEST 2013


On Fri, 06 Sep 2013, ville.syrjala at linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
> We already extract the DPLL state to pipe_config, so let's make use of
> it in i9xx_crtc_clock_get() and avoid the register reads.

What about the calls through intel_dvo_init/intel_lvds_init ->
intel_crtc_mode_get -> i9xx_crtc_clock_get?

Side note, we should s/intel_crtc_mode_get/i9xx_crtc_mode_get/

Jani.



>
> This will also make the function closer to being useable with PCH DPLL
> since the registers for those live in a different address.
>
> Also kill the useless adjusted_mode.clock zeroing. It's already zero at
> this point.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 7 +++----
>  1 file changed, 3 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index c393c8e..754de85 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -7331,14 +7331,14 @@ static void i9xx_crtc_clock_get(struct intel_crtc *crtc,
>  	struct drm_device *dev = crtc->base.dev;
>  	struct drm_i915_private *dev_priv = dev->dev_private;
>  	int pipe = pipe_config->cpu_transcoder;
> -	u32 dpll = I915_READ(DPLL(pipe));
> +	u32 dpll = pipe_config->dpll_hw_state.dpll;
>  	u32 fp;
>  	intel_clock_t clock;
>  
>  	if ((dpll & DISPLAY_RATE_SELECT_FPA1) == 0)
> -		fp = I915_READ(FP0(pipe));
> +		fp = pipe_config->dpll_hw_state.fp0;
>  	else
> -		fp = I915_READ(FP1(pipe));
> +		fp = pipe_config->dpll_hw_state.fp1;
>  
>  	clock.m1 = (fp & FP_M1_DIV_MASK) >> FP_M1_DIV_SHIFT;
>  	if (IS_PINEVIEW(dev)) {
> @@ -7369,7 +7369,6 @@ static void i9xx_crtc_clock_get(struct intel_crtc *crtc,
>  		default:
>  			DRM_DEBUG_KMS("Unknown DPLL mode %08x in programmed "
>  				  "mode\n", (int)(dpll & DPLL_MODE_MASK));
> -			pipe_config->adjusted_mode.clock = 0;
>  			return;
>  		}
>  
> -- 
> 1.8.1.5
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Technology Center



More information about the Intel-gfx mailing list