[Intel-gfx] [PATCH] [v6] drm/i915: Use the new vm [un]bind functions

[Daniel Vetter]

On Thu, Sep 19, 2013 at 10:41:19AM -0700, Ben Widawsky wrote:
> On Thu, Sep 19, 2013 at 03:47:50PM +0100, Chris Wilson wrote:
> > On Thu, Sep 19, 2013 at 07:41:23AM -0700, Ben Widawsky wrote:
> > > diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> > > index b26d979..e57837c 100644
> > > --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> > > +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> > > @@ -286,8 +286,9 @@ i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
> > >  	if (unlikely(IS_GEN6(dev) &&
> > >  	    reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION &&
> > >  	    !target_i915_obj->has_global_gtt_mapping)) {
> > > -		i915_gem_gtt_bind_object(target_i915_obj,
> > > -					 target_i915_obj->cache_level);
> > > +		struct i915_vma *vma = i915_gem_obj_to_vma(obj, vm);
> > > +		vma->vm->bind_vma(vma, target_i915_obj->cache_level,
> > > +				 GLOBAL_BIND);
> > 
> > Danger, danger. What address are we binding the vma here to since vm !=
> > ggtt, and the wa requires that the obj is mapped into the same location
> > in the ggtt as the vm. That requires pinning during reserve.
> > -Chris
> > 
> > -- 
> > Chris Wilson, Intel Open Source Technology Centre
> 
> I thought we've agreed to not support full PPGTT on SNB? If you want an
> assertion vm == i915_ggtt, I can do that.

Yeah, I guess that might clarify things a bit here for this wa.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch