[Intel-gfx] [PATCH 1/7] drm/i915: resurrect ->insert_entries/->clear_range gtt interfaces

[Daniel Vetter]

We need them in the internal tree still.

Also give them neat generic_ prefixes so that it's clear that only
gen6 is special wrt binding/unbinding a vma. And move the to the top
of the file to avoid forward declarations.

Also use the ppgtt version in the ppgtt init code already, to avoid
marking functions as dead code.

Cc: Ben Widawsky <ben at bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 95 +++++++++++++++++--------------------
 1 file changed, 43 insertions(+), 52 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index e053f14..db39612 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -28,6 +28,45 @@
 #include "i915_trace.h"
 #include "intel_drv.h"
 
+/* Generic bind/unbind helpers. */
+static void generic_ppgtt_bind_vma(struct i915_vma *vma,
+				   enum i915_cache_level cache_level,
+				   u32 flags)
+{
+	const unsigned long entry = vma->node.start >> PAGE_SHIFT;
+
+	WARN_ON(flags);
+
+	vma->vm->insert_entries(vma->vm, vma->obj->pages, entry, cache_level);
+}
+
+static void generic_ppgtt_unbind_vma(struct i915_vma *vma)
+{
+	vma->vm->clear_range(vma->vm, vma->node.start >> PAGE_SHIFT,
+			     vma->obj->base.size >> PAGE_SHIFT);
+}
+
+static void generic_ggtt_bind_vma(struct i915_vma *vma,
+				  enum i915_cache_level cache_level,
+				  u32 unused)
+{
+	const unsigned long entry = vma->node.start >> PAGE_SHIFT;
+
+	BUG_ON(!i915_is_ggtt(vma->vm));
+
+	vma->vm->insert_entries(vma->vm, vma->obj->pages, entry, cache_level);
+	vma->obj->has_global_gtt_mapping = 1;
+}
+
+static void generic_ggtt_unbind_vma(struct i915_vma *vma)
+{
+	BUG_ON(!i915_is_ggtt(vma->vm));
+	vma->obj->has_global_gtt_mapping = 0;
+
+	vma->vm->clear_range(vma->vm, vma->node.start >> PAGE_SHIFT,
+			     vma->obj->base.size >> PAGE_SHIFT);
+}
+
 #define GEN6_PPGTT_PD_ENTRIES 512
 #define I915_PPGTT_PT_ENTRIES (PAGE_SIZE / sizeof(gen6_gtt_pte_t))
 
@@ -57,11 +96,6 @@
 #define HSW_WB_ELLC_LLC_AGE0		HSW_CACHEABILITY_CONTROL(0xb)
 #define HSW_WT_ELLC_LLC_AGE0		HSW_CACHEABILITY_CONTROL(0x6)
 
-static void gen6_ppgtt_bind_vma(struct i915_vma *vma,
-				enum i915_cache_level cache_level,
-				u32 flags);
-static void gen6_ppgtt_unbind_vma(struct i915_vma *vma);
-
 static gen6_gtt_pte_t snb_pte_encode(dma_addr_t addr,
 				     enum i915_cache_level level)
 {
@@ -337,9 +371,9 @@ static int gen6_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
 	ppgtt->base.pte_encode = dev_priv->gtt.base.pte_encode;
 	ppgtt->num_pd_entries = GEN6_PPGTT_PD_ENTRIES;
 	ppgtt->enable = gen6_ppgtt_enable;
-	ppgtt->base.unbind_vma = NULL;
+	ppgtt->base.unbind_vma = generic_ppgtt_unbind_vma;
 	ppgtt->base.clear_range = gen6_ppgtt_clear_range;
-	ppgtt->base.bind_vma = NULL;
+	ppgtt->base.bind_vma = generic_ppgtt_bind_vma;
 	ppgtt->base.insert_entries = gen6_ppgtt_insert_entries;
 	ppgtt->base.cleanup = gen6_ppgtt_cleanup;
 	ppgtt->base.scratch = dev_priv->gtt.base.scratch;
@@ -437,26 +471,6 @@ void i915_gem_cleanup_aliasing_ppgtt(struct drm_device *dev)
 	dev_priv->mm.aliasing_ppgtt = NULL;
 }
 
-static void __always_unused
-gen6_ppgtt_bind_vma(struct i915_vma *vma,
-		    enum i915_cache_level cache_level,
-		    u32 flags)
-{
-	const unsigned long entry = vma->node.start >> PAGE_SHIFT;
-
-	WARN_ON(flags);
-
-	gen6_ppgtt_insert_entries(vma->vm, vma->obj->pages, entry, cache_level);
-}
-
-static void __always_unused gen6_ppgtt_unbind_vma(struct i915_vma *vma)
-{
-	const unsigned long entry = vma->node.start >> PAGE_SHIFT;
-
-	gen6_ppgtt_clear_range(vma->vm, entry,
-			       vma->obj->base.size >> PAGE_SHIFT);
-}
-
 extern int intel_iommu_gfx_mapped;
 /* Certain Gen5 chipsets require require idling the GPU before
  * unmapping anything from the GTT when VT-d is enabled.
@@ -604,19 +618,6 @@ static void i915_ggtt_insert_entries(struct i915_address_space *vm,
 
 }
 
-static void i915_ggtt_bind_vma(struct i915_vma *vma,
-			       enum i915_cache_level cache_level,
-			       u32 unused)
-{
-	const unsigned long entry = vma->node.start >> PAGE_SHIFT;
-	unsigned int flags = (cache_level == I915_CACHE_NONE) ?
-		AGP_USER_MEMORY : AGP_USER_CACHED_MEMORY;
-
-	BUG_ON(!i915_is_ggtt(vma->vm));
-	intel_gtt_insert_sg_entries(vma->obj->pages, entry, flags);
-	vma->obj->has_global_gtt_mapping = 1;
-}
-
 static void i915_ggtt_clear_range(struct i915_address_space *vm,
 				  unsigned int first_entry,
 				  unsigned int num_entries)
@@ -624,16 +625,6 @@ static void i915_ggtt_clear_range(struct i915_address_space *vm,
 	intel_gtt_clear_range(first_entry, num_entries);
 }
 
-static void i915_ggtt_unbind_vma(struct i915_vma *vma)
-{
-	const unsigned int first = vma->node.start >> PAGE_SHIFT;
-	const unsigned int size = vma->obj->base.size >> PAGE_SHIFT;
-
-	BUG_ON(!i915_is_ggtt(vma->vm));
-	vma->obj->has_global_gtt_mapping = 0;
-	intel_gtt_clear_range(first, size);
-}
-
 static void gen6_ggtt_bind_vma(struct i915_vma *vma,
 			       enum i915_cache_level cache_level,
 			       u32 flags)
@@ -960,9 +951,9 @@ static int i915_gmch_probe(struct drm_device *dev,
 
 	dev_priv->gtt.do_idle_maps = needs_idle_maps(dev_priv->dev);
 	dev_priv->gtt.base.clear_range = i915_ggtt_clear_range;
-	dev_priv->gtt.base.unbind_vma = i915_ggtt_unbind_vma;
+	dev_priv->gtt.base.unbind_vma = generic_ggtt_unbind_vma;
 	dev_priv->gtt.base.insert_entries = i915_ggtt_insert_entries;
-	dev_priv->gtt.base.bind_vma = i915_ggtt_bind_vma;
+	dev_priv->gtt.base.bind_vma = generic_ggtt_bind_vma;
 
 	return 0;
 }
-- 
1.8.1.4