[Intel-gfx] [PATCH] drm/i915/vlv: reset DPIO on load and resume
Ville Syrjälä
ville.syrjala at linux.intel.com
Fri Sep 27 11:34:31 CEST 2013
On Thu, Sep 26, 2013 at 02:39:14PM -0700, Jesse Barnes wrote:
> This fixes resume on my test platform, since I think some DPIO bits need
> recalibration.
>
> References: https://bugs.freedesktop.org/show_bug.cgi?id=69166
> Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org>
> ---
> drivers/gpu/drm/i915/intel_display.c | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index f52e6d4..320f729 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -1359,6 +1359,17 @@ static void assert_pch_ports_disabled(struct drm_i915_private *dev_priv,
> assert_pch_hdmi_disabled(dev_priv, pipe, PCH_HDMID);
> }
>
> +static void intel_init_dpio(struct drm_device *dev)
> +{
> + struct drm_i915_private *dev_priv = dev->dev_private;
> +
> + if (!IS_VALLEYVIEW(dev))
> + return;
> +
> + /* Reset in case DPIO was stuck across suspend/resume or boot */
> + I915_WRITE(DPIO_CTL, I915_READ(DPIO_CTL) | DPIO_RESET);
This will deassert the common lane reset, so the comment is confusing,
as is the name we have given this bit.
> +}
> +
> static void vlv_enable_pll(struct intel_crtc *crtc)
> {
> struct drm_device *dev = crtc->base.dev;
> @@ -10279,6 +10290,8 @@ void intel_modeset_init_hw(struct drm_device *dev)
> {
> intel_prepare_ddi(dev);
>
> + intel_init_dpio(dev);
> +
> intel_init_clock_gating(dev);
>
> mutex_lock(&dev->struct_mutex);
> --
> 1.8.3.1
>
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--
Ville Syrjälä
Intel OTC
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