[Intel-gfx] [PATCH 2/2] drm/i915/vlv: use correct units for rc6 residency v2

[Daniel Vetter]

On Fri, Sep 27, 2013 at 09:15:58AM +0100, Chris Wilson wrote:
> On Thu, Sep 26, 2013 at 05:55:58PM -0700, Jesse Barnes wrote:
> > We need to use the clock control reg to figure out how many CZ clks are in
> > 30ns and use that as the basis for our RC6 residency calculations.
> > 
> > v2: use ULL everywhere for consistency (Chris)
> >     factor out bias for clarity (Chris)
> 
> I liked the NSEC_PER_MSEC as well :)
> 
> > 
> > References: https://bugs.freedesktop.org/show_bug.cgi?id=69692
> > Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org>
> > ---
> >  drivers/gpu/drm/i915/i915_reg.h   |  3 +++
> >  drivers/gpu/drm/i915/i915_sysfs.c | 22 ++++++++++++++++++++--
> >  2 files changed, 23 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index cf995bb..6f8d0cf 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -1797,6 +1797,9 @@
> >   */
> >  #define HSW_CXT_TOTAL_SIZE		(17 * PAGE_SIZE)
> >  
> > +#define VLV_CLK_CTL2			0x101104
> > +#define   CLK_CTL2_CZCOUNT_30NS_SHIFT	28
> > +
> >  /*
> >   * Overlay regs
> >   */
> > diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
> > index 44f4c1a..8003886 100644
> > --- a/drivers/gpu/drm/i915/i915_sysfs.c
> > +++ b/drivers/gpu/drm/i915/i915_sysfs.c
> > @@ -37,12 +37,30 @@ static u32 calc_residency(struct drm_device *dev, const u32 reg)
> >  {
> >  	struct drm_i915_private *dev_priv = dev->dev_private;
> >  	u64 raw_time; /* 32b value may overflow during fixed point math */
> > +	u64 units = 128ULL, div = 100000ULL, bias = 100ULL;
> >  
> >  	if (!intel_enable_rc6(dev))
> >  		return 0;
> >  
> > -	raw_time = I915_READ(reg) * 128ULL;
> > -	return DIV_ROUND_UP_ULL(raw_time, 100000);
> > +	/* On VLV, residency time is in CZ units rather than 1.28us */
> > +	if (IS_VALLEYVIEW(dev)) {
> > +		u32 clkctl2;
> > +
> > +		clkctl2 = I915_READ(VLV_CLK_CTL2) >>
> > +			CLK_CTL2_CZCOUNT_30NS_SHIFT;
> > +		if (!clkctl2) {
> > +			WARN(!clkctl2, "bogus CZ count value");
> > +			return 0;
> > +		}
> > +		units = DIV_ROUND_UP_ULL(30ULL * bias, (u64)clkctl2);
> > +		if (I915_READ(VLV_COUNTER_CONTROL) & VLV_COUNT_RANGE_HIGH)
> > +			units <<= 8;
> > +
> > +		div = 1000000ULL * bias;
> > +	}
> 
> 	/* On VLV, residency time is in CZ units rather than 1.28us */
> 	if (IS_VALLEVIEW9dev)) {
> 		u32 clkctl2;
> 
> 		clkctl2 = I915_READ(VLV_CLK_CTL2) >>
> 			CLK_CTL2_CZCOUNT_30NS_SHIFT;
> 		if (!clkctl2) {
> 			WARN(!clkctl2, "bogus CZ count value");
> 			return 0;
> 		}
> 
> 		units = DIV_ROUND_UP_ULL(30ULL * bias, (u64)clkctl2);
> 		if (I915_READ(VLV_COUNTER_CONTROL) & VLV_COUNT_RANGE_HIGH)
> 			units <<= 8;
> 
> 		div = NSEC_PER_MSEC * bias;
> 	} else {
> 		units = 128;
> 		div = USEC_PER_MSEC * bias;
> 	}
> 
> 	raw_time = I915_READ(reg) * units;
> 	return DIV_ROUND_UP_ULL(raw_time, div);
> 
> Either way, with or without the extra constants,
> Both patches,
> Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>

Both merged without further bikeshedding applied. Thanks for
patches&review.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch