[Intel-gfx] [PATCH 5/5] drm/i915/vlv: add valleyview_crtc_disable function

[Daniel Vetter]

On Fri, Sep 27, 2013 at 12:57:26PM -0700, Jesse Barnes wrote:
> To handle disabling DP after the CPU pipe is disabled, per the
> workaround.
> 
> References: https://bugs.freedesktop.org/show_bug.cgi?id=58152
> Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org>

This also applies to g4x apparently and really encoder type checks in the
crtc code is just evil. Furthermore it seems to be already implemented, at
least that's my impression from reading intel_dp.c.
-Daniel


> ---
>  drivers/gpu/drm/i915/intel_display.c | 58 ++++++++++++++++++++++++++++++++----
>  1 file changed, 53 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 2c040cd..9a7136c 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -3873,6 +3873,57 @@ static void i9xx_pfit_disable(struct intel_crtc *crtc)
>  	I915_WRITE(PFIT_CONTROL, 0);
>  }
>  
> +static void valleyview_crtc_disable(struct drm_crtc *crtc)
> +{
> +	struct drm_device *dev = crtc->dev;
> +	struct drm_i915_private *dev_priv = dev->dev_private;
> +	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> +	struct intel_encoder *encoder;
> +	int pipe = intel_crtc->pipe;
> +	int plane = intel_crtc->plane;
> +
> +	if (!intel_crtc->active)
> +		return;
> +
> +	for_each_encoder_on_crtc(dev, crtc, encoder)
> +		if (!(encoder->type == INTEL_OUTPUT_DISPLAYPORT ||
> +		      encoder->type == INTEL_OUTPUT_EDP))
> +			encoder->disable(encoder);
> +
> +	/* Give the overlay scaler a chance to disable if it's on this pipe */
> +	intel_crtc_wait_for_pending_flips(crtc);
> +	drm_vblank_off(dev, pipe);
> +
> +	if (dev_priv->fbc.plane == plane)
> +		intel_disable_fbc(dev);
> +
> +	intel_crtc_dpms_overlay(intel_crtc, false);
> +	intel_crtc_update_cursor(crtc, false);
> +	intel_disable_planes(crtc);
> +	intel_disable_plane(dev_priv, plane, pipe);
> +
> +	intel_disable_pipe(dev_priv, pipe);
> +
> +	for_each_encoder_on_crtc(dev, crtc, encoder)
> +		if (encoder->type == INTEL_OUTPUT_DISPLAYPORT ||
> +		    encoder->type == INTEL_OUTPUT_EDP)
> +			encoder->disable(encoder);
> +
> +	i9xx_pfit_disable(intel_crtc);
> +
> +	for_each_encoder_on_crtc(dev, crtc, encoder)
> +		if (encoder->post_disable)
> +			encoder->post_disable(encoder);
> +
> +	if (!intel_pipe_has_type(crtc, INTEL_OUTPUT_DSI))
> +		vlv_disable_pll(dev_priv, pipe);
> +
> +	intel_crtc->active = false;
> +	intel_update_watermarks(crtc);
> +
> +	intel_update_fbc(dev);
> +}
> +
>  static void i9xx_crtc_disable(struct drm_crtc *crtc)
>  {
>  	struct drm_device *dev = crtc->dev;
> @@ -3908,10 +3959,7 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc)
>  		if (encoder->post_disable)
>  			encoder->post_disable(encoder);
>  
> -	if (IS_VALLEYVIEW(dev) && !intel_pipe_has_type(crtc, INTEL_OUTPUT_DSI))
> -		vlv_disable_pll(dev_priv, pipe);
> -	else if (!IS_VALLEYVIEW(dev))
> -		i9xx_disable_pll(dev_priv, pipe);
> +	i9xx_disable_pll(dev_priv, pipe);
>  
>  	intel_crtc->active = false;
>  	intel_update_watermarks(crtc);
> @@ -10048,7 +10096,7 @@ static void intel_init_display(struct drm_device *dev)
>  		dev_priv->display.get_pipe_config = i9xx_get_pipe_config;
>  		dev_priv->display.crtc_mode_set = i9xx_crtc_mode_set;
>  		dev_priv->display.crtc_enable = valleyview_crtc_enable;
> -		dev_priv->display.crtc_disable = i9xx_crtc_disable;
> +		dev_priv->display.crtc_disable = valleyview_crtc_disable;
>  		dev_priv->display.off = i9xx_crtc_off;
>  		dev_priv->display.update_plane = i9xx_update_plane;
>  	} else {
> -- 
> 1.8.3.1
> 
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch