[Intel-gfx] [PATCH 17/49] drm/i915/bdw: A bit more advanced context init/fini
Damien Lespiau
damien.lespiau at intel.com
Tue Apr 1 15:51:27 CEST 2014
On Tue, Apr 01, 2014 at 02:47:19PM +0100, Mateo Lozano, Oscar wrote:
> > > --- a/drivers/gpu/drm/i915/i915_lrc.c
> > > +++ b/drivers/gpu/drm/i915/i915_lrc.c
> > > @@ -41,7 +41,45 @@
> > > #include <drm/i915_drm.h>
> > > #include "i915_drv.h"
> > >
> > > +#define GEN8_LR_CONTEXT_SIZE (21 * PAGE_SIZE)
> >
> > I'm a bit puzzled by that number:
> > - I found a sentence saying: "the Context Image for the rendering
> > engine consists of 20 4K pages", which seems that it includes the
> > HWS page (on the same page it says context layout = HWS Page +
> > register state context).
> > - When looking at the register state context for the render engine:
> > 18096 dwords -> 18 pages, so in total it'd be 19 pages (need to add
> > the HWS Page)
> > - Clearly I must be missing something :)
> > - That's only for the render engine, other engines have a much smaller
> > context, smaller enough that it's worth looking at their exact size.
> > - It'd be nice to work out the real size from the *CXT_*SIZE
> > registers.
>
> Hmmmm... I´ll try to get the real context sizes from the registers and
> compare. At least for RCS, VCS and BCS since there doesn´t seem to be
> a register for VECS?
Couldn't find it either. I guess we'll need to ask the help of a friend.
Or the 50/50 joker maybe.
--
Damien
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