[Intel-gfx] [PATCH 41/49] drm/i915/bdw: LR context switch interrupts

[Damien Lespiau]

On Thu, Mar 27, 2014 at 06:00:10PM +0000, oscar.mateo at intel.com wrote:
> @@ -543,6 +545,9 @@ static int init_ring_common_lrc(struct intel_engine *ring)
>  	ringbuf->space = ringbuf->size;
>  	ringbuf->last_retired_head = -1;
>  
> +	I915_WRITE_IMR(ring, ~(ring->irq_enable_mask | ring->irq_keep_mask));
> +	I915_WRITE(RING_HWSTAM(ring->mmio_base), ~(ring->irq_enable_mask | ring->irq_keep_mask));
> +
>  	return 0;
>  }
>  

Two little things:

  - I don't see any place where we look at the interrupt reporting in
    the HWS page, so we could just initialize HWSTAM to 0xffffffff

  - There's a programming note we don't seem to respect "At most 1 bit
    can be unmasked at any given time". That would be solved by the
    first point if I did not miss a call site using it.

-- 
Damien