[Intel-gfx] [PATCH 41/49] drm/i915/bdw: LR context switch interrupts

[Damien Lespiau]

On Wed, Apr 02, 2014 at 01:49:38PM +0200, Daniel Vetter wrote:
> On Wed, Apr 02, 2014 at 12:42:11PM +0100, Damien Lespiau wrote:
> > On Thu, Mar 27, 2014 at 06:00:10PM +0000, oscar.mateo at intel.com wrote:
> > > @@ -543,6 +545,9 @@ static int init_ring_common_lrc(struct intel_engine *ring)
> > >  	ringbuf->space = ringbuf->size;
> > >  	ringbuf->last_retired_head = -1;
> > >  
> > > +	I915_WRITE_IMR(ring, ~(ring->irq_enable_mask | ring->irq_keep_mask));
> > > +	I915_WRITE(RING_HWSTAM(ring->mmio_base), ~(ring->irq_enable_mask | ring->irq_keep_mask));
> > > +
> > >  	return 0;
> > >  }
> > >  
> > 
> > Two little things:
> > 
> >   - I don't see any place where we look at the interrupt reporting in
> >     the HWS page, so we could just initialize HWSTAM to 0xffffffff
> 
> It's an old w/a to make interrupt signalling a little bit more coherent.
> No idea whether we still need it since we don't really have a good
> testcase for interrupts ... I guess we could give it a shot with a patch
> and a big commit message citing all the history.

Another detail, is that we're unmasking interrupts in HWSTAM that are
not supposed to be unmasked because the HW doesn't support reporting
them to the HWSP (eg. Context Switch Interrupt).

-- 
Damien