[Intel-gfx] [PATCH 1/4] drm/i915/vlv: write the port field in the per-pipe DIP control reg

[Ville Syrjälä]

On Wed, Apr 02, 2014 at 10:08:51AM -0700, Jesse Barnes wrote:
> In case we end up bouncing these around between ports.
> 
> Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org>

Whoops. Almost missed this one. I must have an spam filter for cover
letters in my brain or something,

Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_hdmi.c |   12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
> index b0413e1..ee892a4 100644
> --- a/drivers/gpu/drm/i915/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> @@ -557,10 +557,12 @@ static void vlv_set_infoframes(struct drm_encoder *encoder,
>  			       struct drm_display_mode *adjusted_mode)
>  {
>  	struct drm_i915_private *dev_priv = encoder->dev->dev_private;
> +	struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder);
>  	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
>  	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
>  	u32 reg = VLV_TVIDEO_DIP_CTL(intel_crtc->pipe);
>  	u32 val = I915_READ(reg);
> +	u32 port = VIDEO_DIP_PORT(intel_dig_port->port);
>  
>  	assert_hdmi_port_disabled(intel_hdmi);
>  
> @@ -576,6 +578,16 @@ static void vlv_set_infoframes(struct drm_encoder *encoder,
>  		return;
>  	}
>  
> +	if (port != (val & VIDEO_DIP_PORT_MASK)) {
> +		if (val & VIDEO_DIP_ENABLE) {
> +			val &= ~VIDEO_DIP_ENABLE;
> +			I915_WRITE(reg, val);
> +			POSTING_READ(reg);
> +		}
> +		val &= ~VIDEO_DIP_PORT_MASK;
> +		val |= port;
> +	}
> +
>  	val |= VIDEO_DIP_ENABLE;
>  	val &= ~(VIDEO_DIP_ENABLE_VENDOR | VIDEO_DIP_ENABLE_GAMUT |
>  		 VIDEO_DIP_ENABLE_GCP);
> -- 
> 1.7.9.5
> 
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-- 
Ville Syrjälä
Intel OTC